Version 3.9.13
Add code kind check before preparing for OSR. (issue 1900, 115073)
Pass zone explicitly to zone-allocation on x64 and ARM. (issue 1802)
Port string construct stub to x64. (issue 849)
Performance and stability improvements on all platforms.
git-svn-id: http://v8.googlecode.com/svn/trunk@10875 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
diff --git a/src/runtime.cc b/src/runtime.cc
index fdbe1f5..d9c5bed 100644
--- a/src/runtime.cc
+++ b/src/runtime.cc
@@ -3763,7 +3763,7 @@
int required_registers = RegExpImpl::IrregexpPrepare(regexp, subject);
if (required_registers < 0) return RegExpImpl::RE_EXCEPTION;
- OffsetsVector registers(required_registers);
+ OffsetsVector registers(required_registers, isolate);
Vector<int32_t> register_vector(registers.vector(), registers.length());
int subject_length = subject->length();
bool first = true;
@@ -3836,7 +3836,7 @@
int required_registers = RegExpImpl::IrregexpPrepare(regexp, subject);
if (required_registers < 0) return RegExpImpl::RE_EXCEPTION;
- OffsetsVector registers(required_registers);
+ OffsetsVector registers(required_registers, isolate);
Vector<int32_t> register_vector(registers.vector(), registers.length());
RegExpImpl::IrregexpResult result =
@@ -3855,7 +3855,7 @@
if (result == RegExpImpl::RE_SUCCESS) {
// Need to keep a copy of the previous match for creating last_match_info
// at the end, so we have two vectors that we swap between.
- OffsetsVector registers2(required_registers);
+ OffsetsVector registers2(required_registers, isolate);
Vector<int> prev_register_vector(registers2.vector(), registers2.length());
bool first = true;
do {
@@ -9200,13 +9200,13 @@
return isolate->StackOverflow();
}
- return Execution::HandleStackGuardInterrupt();
+ return Execution::HandleStackGuardInterrupt(isolate);
}
RUNTIME_FUNCTION(MaybeObject*, Runtime_Interrupt) {
ASSERT(args.length() == 0);
- return Execution::HandleStackGuardInterrupt();
+ return Execution::HandleStackGuardInterrupt(isolate);
}