Add ARMTargetCodeGenInfo::initDwarfEHRegSizeTable() defining 16 32bit regs.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@131558 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index bc2472c..73526fb 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -2279,6 +2279,22 @@
int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
return 13;
}
+
+ bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
+ llvm::Value *Address) const {
+ CodeGen::CGBuilderTy &Builder = CGF.Builder;
+ llvm::LLVMContext &Context = CGF.getLLVMContext();
+
+ const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
+ llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
+
+ // 0-15 are the 16 integer registers.
+ AssignToArrayRange(Builder, Address, Four8, 0, 15);
+
+ return false;
+ }
+
+
};
}