commit 4de971651ba09009d4a7cc6d2fbc978dd7092263
author Chad Rosier <mcrosier@apple.com> Tue Sep 11 00:51:28 2012 +0000
committer Chad Rosier <mcrosier@apple.com> Tue Sep 11 00:51:28 2012 +0000
tree ea761136e0bd69499d9db01779ba52a689e0ee60
parent 116bb09882bc1c9281cd84dd07496201feb18d18

[ms-inline asm] Add $$ before numeric constants in the IR.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@163581 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/ms-inline-asm.c

diff --git a/test/CodeGen/ms-inline-asm.c b/test/CodeGen/ms-inline-asm.c
index 43b3013..8f8d687 100644
--- a/test/CodeGen/ms-inline-asm.c
+++ b/test/CodeGen/ms-inline-asm.c
@@ -20,7 +20,7 @@
 
 void t3() {
 // CHECK: @t3
-// CHECK: call void asm sideeffect inteldialect "nop\0Anop\0Anop", "~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: ret void
   __asm nop __asm nop __asm nop
 }
@@ -36,7 +36,7 @@
 
 void t5(void) {
 // CHECK: @t5
-// CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0Amov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: ret void
   __asm mov ebx, eax __asm mov ecx, ebx
 }
@@ -44,7 +44,7 @@
 void t6(void) {
   __asm int 0x2c
 // CHECK: t6
-// CHECK: call void asm sideeffect inteldialect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
 }
 
 void t7() {
@@ -53,7 +53,7 @@
   }
   __asm {}
 // CHECK: t7
-// CHECK: call void asm sideeffect inteldialect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
 }
 int t8() {
@@ -62,9 +62,9 @@
   __asm int 4
   return 10;
 // CHECK: t8
-// CHECK: call void asm sideeffect inteldialect "int 3", "~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "int $$3", "~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
-// CHECK: call void asm sideeffect inteldialect "int 4", "~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "int $$4", "~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: ret i32 10
 }
 void t9() {
@@ -74,7 +74,7 @@
     pop ebx
   }
 // CHECK: t9
-// CHECK: call void asm sideeffect inteldialect "push ebx\0Amov ebx, 0x07\0Apop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
+// CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
 }
 
 unsigned t10(void) {
@@ -88,7 +88,7 @@
 // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4
 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4
 // CHECK: store i32 1, i32* [[I]], align 4
-// CHECK: call i32 asm sideeffect inteldialect "mov eax, $1\0Amov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind
+// CHECK: call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind
 // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4
 // CHECK: ret i32 [[RET]]
 }
@@ -121,3 +121,9 @@
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
 }
+
+void t14(void) {
+  __asm mov eax, 1
+// CHECK: t14
+// CHECK: call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
+}