Add AVX2 intrinsics for and, andn, or, and xor.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@146862 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/avx2-builtins.c b/test/CodeGen/avx2-builtins.c
index b40342f..778cc32 100644
--- a/test/CodeGen/avx2-builtins.c
+++ b/test/CodeGen/avx2-builtins.c
@@ -134,3 +134,24 @@
// CHECK: @llvm.x86.avx2.psubus.w
return _mm256_subs_epu16(a, b);
}
+
+__m256 test_mm256_and_si256(__m256 a, __m256 b) {
+ // CHECK: and <4 x i64>
+ return _mm256_and_si256(a, b);
+}
+
+__m256 test_mm256_andnot_si256(__m256 a, __m256 b) {
+ // CHECK: xor <4 x i64>
+ // CHECK: and <4 x i64>
+ return _mm256_andnot_si256(a, b);
+}
+
+__m256 test_mm256_or_si256(__m256 a, __m256 b) {
+ // CHECK: or <4 x i64>
+ return _mm256_or_si256(a, b);
+}
+
+__m256 test_mm256_xor_si256(__m256 a, __m256 b) {
+ // CHECK: xor <4 x i64>
+ return _mm256_xor_si256(a, b);
+}