IRgen: Move the bit-field access type into CGBitFieldInfo, and change bit-field LValues to just store the base address of object containing the bit-field.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@100745 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/CGRecordLayoutBuilder.cpp b/lib/CodeGen/CGRecordLayoutBuilder.cpp
index 4b9ec66..fdd8d05 100644
--- a/lib/CodeGen/CGRecordLayoutBuilder.cpp
+++ b/lib/CodeGen/CGRecordLayoutBuilder.cpp
@@ -180,7 +180,7 @@
 
   bool IsSigned = D->getType()->isSignedIntegerType();
   LLVMBitFields.push_back(LLVMBitFieldInfo(
-                            D, CGBitFieldInfo(FieldOffset / TypeSizeInBits,
+                            D, CGBitFieldInfo(Ty, FieldOffset / TypeSizeInBits,
                                               FieldOffset % TypeSizeInBits,
                                               FieldSize, IsSigned)));
 
@@ -270,6 +270,8 @@
        FieldEnd = D->field_end(); Field != FieldEnd; ++Field, ++FieldNo) {
     assert(Layout.getFieldOffset(FieldNo) == 0 &&
           "Union field offset did not start at the beginning of record!");
+    const llvm::Type *FieldTy =
+      Types.ConvertTypeForMemRecursive(Field->getType());
 
     if (Field->isBitField()) {
       uint64_t FieldSize =
@@ -282,7 +284,7 @@
       // Add the bit field info.
       bool IsSigned = Field->getType()->isSignedIntegerType();
       LLVMBitFields.push_back(LLVMBitFieldInfo(
-                                *Field, CGBitFieldInfo(0, 0, FieldSize,
+                                *Field, CGBitFieldInfo(FieldTy, 0, 0, FieldSize,
                                                        IsSigned)));
     } else {
       LLVMFields.push_back(LLVMFieldInfo(*Field, 0));
@@ -290,8 +292,6 @@
 
     HasOnlyZeroSizedBitFields = false;
 
-    const llvm::Type *FieldTy =
-      Types.ConvertTypeForMemRecursive(Field->getType());
     unsigned FieldAlign = Types.getTargetData().getABITypeAlignment(FieldTy);
     uint64_t FieldSize = Types.getTargetData().getTypeAllocSize(FieldTy);