commit 899245792776dd219a3c36eb19b42272e270bc0c
author Bill Wendling <isanbard@gmail.com> Wed Feb 27 00:06:04 2013 +0000
committer Bill Wendling <isanbard@gmail.com> Wed Feb 27 00:06:04 2013 +0000
tree 6ac05a34d42c4b09361726b0125cb335297ee3ee
parent deb8f5d533b7bcd962976ecdbc1464fe754b6de0

Reapply r176133 with testcase fixes.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176145 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/mips-vector-arg.c

diff --git a/test/CodeGen/mips-vector-arg.c b/test/CodeGen/mips-vector-arg.c
index 3202ebd..6ffb043 100644
--- a/test/CodeGen/mips-vector-arg.c
+++ b/test/CodeGen/mips-vector-arg.c
@@ -8,26 +8,24 @@
 typedef float  v4sf __attribute__ ((__vector_size__ (16)));
 typedef int v4i32 __attribute__ ((__vector_size__ (16)));
 
-// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW1:#[0-9]+]]
+// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW:#[0-9]+]]
 // O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
-// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW1:#[0-9]+]]
+// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW:#[0-9]+]]
 // N64: declare i32 @test_v4sf_2(i64, i64, i32, i64, i64, i64)
 extern test_v4sf_2(v4sf, int, v4sf);
 void test_v4sf(v4sf a1, int a2, v4sf a3) {
   test_v4sf_2(a3, a2, a1);
 }
 
-// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW2:#[0-9]+]]
+// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW]]
 // O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
-// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW2:#[0-9]+]]
+// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW]]
 // N64: declare i32 @test_v4i32_2(i64, i64, i32, i64, i64, i64)
 extern test_v4i32_2(v4i32, int, v4i32);
 void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
   test_v4i32_2(a3, a2, a1);
 }
 
-// O32: attributes [[NUW1]] = { nounwind{{.*}} }
-// O32: attributes [[NUW2]] = { nounwind{{.*}} }
+// O32: attributes [[NUW]] = { nounwind{{.*}} }
 
-// N64: attributes [[NUW1]] = { nounwind{{.*}} }
-// N64: attributes [[NUW2]] = { nounwind{{.*}} }
+// N64: attributes [[NUW]] = { nounwind{{.*}} }