commit a09300a9db77743f6c8f13da51e332a07bb31145
author Zhongxing Xu <xuzhongxing@gmail.com> Sat Nov 15 05:18:50 2008 +0000
committer Zhongxing Xu <xuzhongxing@gmail.com> Sat Nov 15 05:18:50 2008 +0000
tree ab4d70409e050e7f0dfb5f84814c159f8863e520
parent 8bb87e8de5fc8e4c91e78468b65a66b5b2b82d71

Improve zero value generation.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@59356 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Analysis/RegionStore.cpp

diff --git a/lib/Analysis/RegionStore.cpp b/lib/Analysis/RegionStore.cpp
index b09c49e..f1c57b3 100644
--- a/lib/Analysis/RegionStore.cpp
+++ b/lib/Analysis/RegionStore.cpp
@@ -232,8 +232,7 @@
   const MemRegion* ArrayR = cast<loc::MemRegionVal>(&Array)->getRegion();
   BasicValueFactory& BasicVals = StateMgr.getBasicVals();
 
-  // FIXME: Find a better way to get bit width.
-  nonloc::ConcreteInt Idx(BasicVals.getValue(0, 32, false));
+  nonloc::ConcreteInt Idx(BasicVals.getZeroWithPtrWidth(false));
   ElementRegion* ER = MRMgr.getElementRegion(Idx, ArrayR);
   
   return loc::MemRegionVal(ER);