blob: 0d28642e4b0ee828312cb3f899977a333e58788f [file] [log] [blame]
Daniel Dunbar8aa87c72010-09-23 01:54:28 +00001// RUN: %clang_cc1 -triple thumbv7-apple-darwin9 \
2// RUN: -target-abi apcs-gnu \
3// RUN: -target-cpu cortex-a8 \
4// RUN: -mfloat-abi soft \
5// RUN: -target-feature +soft-float-abi \
6// RUN: -emit-llvm -w -o - %s | FileCheck %s
7
8#include <arm_neon.h>
9
10// CHECK: define void @f0(%struct.__simd128_int8_t* sret %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}})
11int8x16_t f0(int8x16_t a0, int8x16_t a1) {
12 return vzipq_s8(a0, a1).val[0];
13}
Daniel Dunbarf554b1c2010-09-23 01:54:32 +000014
15// Test direct vector passing.
16
17typedef float T_float32x2 __attribute__ ((__vector_size__ (8)));
18typedef float T_float32x4 __attribute__ ((__vector_size__ (16)));
19typedef float T_float32x8 __attribute__ ((__vector_size__ (32)));
20typedef float T_float32x16 __attribute__ ((__vector_size__ (64)));
21
22// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}})
23T_float32x2 f1_0(T_float32x2 a0) { return a0; }
24// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}})
25T_float32x4 f1_1(T_float32x4 a0) { return a0; }
26// CHECK: define void @f1_2(<8 x float>* sret %{{.*}}, <8 x float> %{{.*}})
27T_float32x8 f1_2(T_float32x8 a0) { return a0; }
28// CHECK: define void @f1_3(<16 x float>* sret %{{.*}}, <16 x float> %{{.*}})
29T_float32x16 f1_3(T_float32x16 a0) { return a0; }