Chad Rosier | 48a05b9 | 2012-08-08 21:15:52 +0000 | [diff] [blame] | 1 | // RUN: %clang_cc1 %s -triple x86_64-apple-darwin10 -O0 -fms-extensions -fenable-experimental-ms-inline-asm -w -emit-llvm -o - | FileCheck %s |
Chad Rosier | b64f310 | 2012-08-08 20:37:31 +0000 | [diff] [blame] | 2 | |
| 3 | void t1() { |
| 4 | // CHECK: @t1 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 5 | // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | b64f310 | 2012-08-08 20:37:31 +0000 | [diff] [blame] | 6 | // CHECK: ret void |
| 7 | __asm {} |
| 8 | } |
Chad Rosier | 265f538 | 2012-08-13 20:32:07 +0000 | [diff] [blame] | 9 | |
| 10 | void t2() { |
| 11 | // CHECK: @t2 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 12 | // CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind |
| 13 | // CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind |
| 14 | // CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 265f538 | 2012-08-13 20:32:07 +0000 | [diff] [blame] | 15 | // CHECK: ret void |
| 16 | __asm nop |
| 17 | __asm nop |
| 18 | __asm nop |
| 19 | } |
| 20 | |
| 21 | void t3() { |
| 22 | // CHECK: @t3 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 23 | // CHECK: call void asm sideeffect inteldialect "nop\0Anop\0Anop", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 265f538 | 2012-08-13 20:32:07 +0000 | [diff] [blame] | 24 | // CHECK: ret void |
| 25 | __asm nop __asm nop __asm nop |
| 26 | } |
| 27 | |
| 28 | void t4(void) { |
| 29 | // CHECK: @t4 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 30 | // CHECK: call void asm sideeffect inteldialect "mov ebx, eax", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind |
| 31 | // CHECK: call void asm sideeffect inteldialect "mov ecx, ebx", "~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 265f538 | 2012-08-13 20:32:07 +0000 | [diff] [blame] | 32 | // CHECK: ret void |
| 33 | __asm mov ebx, eax |
| 34 | __asm mov ecx, ebx |
| 35 | } |
| 36 | |
| 37 | void t5(void) { |
| 38 | // CHECK: @t5 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 39 | // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0Amov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 265f538 | 2012-08-13 20:32:07 +0000 | [diff] [blame] | 40 | // CHECK: ret void |
| 41 | __asm mov ebx, eax __asm mov ecx, ebx |
| 42 | } |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 43 | |
| 44 | void t6(void) { |
| 45 | __asm int 0x2c |
| 46 | // CHECK: t6 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 47 | // CHECK: call void asm sideeffect inteldialect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 48 | } |
| 49 | |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 50 | void t7() { |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 51 | __asm { |
| 52 | int 0x2c ; } asm comments are fun! }{ |
| 53 | } |
| 54 | __asm {} |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 55 | // CHECK: t7 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 56 | // CHECK: call void asm sideeffect inteldialect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind |
| 57 | // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 58 | } |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 59 | int t8() { |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 60 | __asm int 3 ; } comments for single-line asm |
| 61 | __asm {} |
| 62 | __asm int 4 |
| 63 | return 10; |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 64 | // CHECK: t8 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 65 | // CHECK: call void asm sideeffect inteldialect "int 3", "~{dirflag},~{fpsr},~{flags}"() nounwind |
| 66 | // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind |
| 67 | // CHECK: call void asm sideeffect inteldialect "int 4", "~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 68 | // CHECK: ret i32 10 |
| 69 | } |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 70 | void t9() { |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 71 | __asm { |
| 72 | push ebx |
| 73 | mov ebx, 0x07 |
| 74 | pop ebx |
| 75 | } |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 76 | // CHECK: t9 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 77 | // CHECK: call void asm sideeffect inteldialect "push ebx\0Amov ebx, 0x07\0Apop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind |
Chad Rosier | 27ef16b | 2012-08-14 23:48:41 +0000 | [diff] [blame] | 78 | } |
Chad Rosier | f64c118 | 2012-08-16 17:10:59 +0000 | [diff] [blame] | 79 | |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 80 | unsigned t10(void) { |
Chad Rosier | f64c118 | 2012-08-16 17:10:59 +0000 | [diff] [blame] | 81 | unsigned i = 1, j; |
| 82 | __asm { |
| 83 | mov eax, i |
| 84 | mov j, eax |
| 85 | } |
| 86 | return j; |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 87 | // CHECK: t10 |
Chad Rosier | f64c118 | 2012-08-16 17:10:59 +0000 | [diff] [blame] | 88 | // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4 |
| 89 | // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4 |
| 90 | // CHECK: store i32 1, i32* [[I]], align 4 |
Chad Rosier | fcf75a3 | 2012-09-05 19:01:07 +0000 | [diff] [blame^] | 91 | // CHECK: call i32 asm sideeffect inteldialect "mov eax, i\0Amov j, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind |
Chad Rosier | f64c118 | 2012-08-16 17:10:59 +0000 | [diff] [blame] | 92 | // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4 |
| 93 | // CHECK: ret i32 [[RET]] |
| 94 | } |
Chad Rosier | 700ce64 | 2012-08-16 22:25:38 +0000 | [diff] [blame] | 95 | |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 96 | void t11(void) { |
Chad Rosier | 700ce64 | 2012-08-16 22:25:38 +0000 | [diff] [blame] | 97 | __asm EVEN |
| 98 | __asm ALIGN |
| 99 | } |
| 100 | |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 101 | void t12(void) { |
Chad Rosier | 700ce64 | 2012-08-16 22:25:38 +0000 | [diff] [blame] | 102 | __asm { |
| 103 | _emit 0x4A |
| 104 | _emit 0x43 |
| 105 | _emit 0x4B |
| 106 | } |
| 107 | } |
| 108 | |
Chad Rosier | 7fcde17 | 2012-08-21 17:01:26 +0000 | [diff] [blame] | 109 | void t13(void) { |
Chad Rosier | 700ce64 | 2012-08-16 22:25:38 +0000 | [diff] [blame] | 110 | unsigned arr[10]; |
| 111 | __asm LENGTH arr ; sizeof(arr)/sizeof(arr[0]) |
| 112 | __asm SIZE arr ; sizeof(arr) |
| 113 | __asm TYPE arr ; sizeof(arr[0]) |
| 114 | } |