Stephen Hines | 6bcf27b | 2014-05-29 04:14:42 -0700 | [diff] [blame] | 1 | // RUN: %clang_cc1 -triple arm64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s |
Tim Northover | c264e16 | 2013-01-31 12:13:10 +0000 | [diff] [blame] | 2 | |
| 3 | // The only part clang really deals with is the lvalue/rvalue |
| 4 | // distinction on constraints. It's sufficient to emit llvm and make |
| 5 | // sure that's sane. |
| 6 | |
| 7 | long var; |
| 8 | |
| 9 | void test_generic_constraints(int var32, long var64) { |
| 10 | asm("add %0, %1, %1" : "=r"(var32) : "0"(var32)); |
Pirama Arumuga Nainar | 3ea9e33 | 2015-04-08 08:57:32 -0700 | [diff] [blame] | 11 | // CHECK: [[R32_ARG:%[a-zA-Z0-9]+]] = load i32, i32* |
Tim Northover | c264e16 | 2013-01-31 12:13:10 +0000 | [diff] [blame] | 12 | // CHECK: call i32 asm "add $0, $1, $1", "=r,0"(i32 [[R32_ARG]]) |
| 13 | |
| 14 | asm("add %0, %1, %1" : "=r"(var64) : "0"(var64)); |
Pirama Arumuga Nainar | 3ea9e33 | 2015-04-08 08:57:32 -0700 | [diff] [blame] | 15 | // CHECK: [[R32_ARG:%[a-zA-Z0-9]+]] = load i64, i64* |
Tim Northover | c264e16 | 2013-01-31 12:13:10 +0000 | [diff] [blame] | 16 | // CHECK: call i64 asm "add $0, $1, $1", "=r,0"(i64 [[R32_ARG]]) |
| 17 | |
| 18 | asm("ldr %0, %1" : "=r"(var32) : "m"(var)); |
| 19 | asm("ldr %0, [%1]" : "=r"(var64) : "r"(&var)); |
| 20 | // CHECK: call i32 asm "ldr $0, $1", "=r,*m"(i64* @var) |
| 21 | // CHECK: call i64 asm "ldr $0, [$1]", "=r,r"(i64* @var) |
| 22 | } |
| 23 | |
| 24 | float f; |
| 25 | double d; |
| 26 | void test_constraint_w() { |
| 27 | asm("fadd %s0, %s1, %s1" : "=w"(f) : "w"(f)); |
Pirama Arumuga Nainar | 3ea9e33 | 2015-04-08 08:57:32 -0700 | [diff] [blame] | 28 | // CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, float* @f |
Tim Northover | c264e16 | 2013-01-31 12:13:10 +0000 | [diff] [blame] | 29 | // CHECK: call float asm "fadd ${0:s}, ${1:s}, ${1:s}", "=w,w"(float [[FLT_ARG]]) |
| 30 | |
| 31 | asm("fadd %d0, %d1, %d1" : "=w"(d) : "w"(d)); |
Pirama Arumuga Nainar | 3ea9e33 | 2015-04-08 08:57:32 -0700 | [diff] [blame] | 32 | // CHECK: [[DBL_ARG:%[a-zA-Z_0-9]+]] = load double, double* @d |
Tim Northover | c264e16 | 2013-01-31 12:13:10 +0000 | [diff] [blame] | 33 | // CHECK: call double asm "fadd ${0:d}, ${1:d}, ${1:d}", "=w,w"(double [[DBL_ARG]]) |
| 34 | } |
| 35 | |
| 36 | void test_constraints_immed(void) { |
| 37 | asm("add x0, x0, %0" : : "I"(4095) : "x0"); |
| 38 | asm("and w0, w0, %0" : : "K"(0xaaaaaaaa) : "w0"); |
| 39 | asm("and x0, x0, %0" : : "L"(0xaaaaaaaaaaaaaaaa) : "x0"); |
| 40 | // CHECK: call void asm sideeffect "add x0, x0, $0", "I,~{x0}"(i32 4095) |
| 41 | // CHECK: call void asm sideeffect "and w0, w0, $0", "K,~{w0}"(i32 -1431655766) |
| 42 | // CHECK: call void asm sideeffect "and x0, x0, $0", "L,~{x0}"(i64 -6148914691236517206) |
| 43 | } |
| 44 | |
| 45 | void test_constraint_S(void) { |
| 46 | int *addr; |
| 47 | asm("adrp %0, %A1\n\t" |
| 48 | "add %0, %0, %L1" : "=r"(addr) : "S"(&var)); |
| 49 | // CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* @var) |
| 50 | } |
| 51 | |
| 52 | void test_constraint_Q(void) { |
| 53 | int val; |
| 54 | asm("ldxr %0, %1" : "=r"(val) : "Q"(var)); |
| 55 | // CHECK: call i32 asm "ldxr $0, $1", "=r,*Q"(i64* @var) |
| 56 | } |