blob: 4e22bba7d7192b9c4f39a255dd36897bb502ef27 [file] [log] [blame]
John McCallbc8d40d2011-06-24 21:55:10 +00001// RUN: %clang_cc1 -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s
2
Richard Smithf6702a32011-12-20 02:08:33 +00003template<typename T>
4struct S {
5 static int n;
6};
7template<typename T> int S<T>::n = 5;
8
9int f() {
10 // Make sure that the reference here is enough to trigger the instantiation of
11 // the static data member.
Stephen Hines6bcf27b2014-05-29 04:14:42 -070012 // CHECK: @_ZN1SIiE1nE = linkonce_odr global i32 5
Richard Smithf6702a32011-12-20 02:08:33 +000013 int a[S<int>::n];
14 return sizeof a;
15}
16
John McCallbc8d40d2011-06-24 21:55:10 +000017// rdar://problem/9506377
18void test0(void *array, int n) {
Stephen Lin93ab6bf2013-08-15 06:47:53 +000019 // CHECK-LABEL: define void @_Z5test0Pvi(
John McCallbc8d40d2011-06-24 21:55:10 +000020 // CHECK: [[ARRAY:%.*]] = alloca i8*, align 8
21 // CHECK-NEXT: [[N:%.*]] = alloca i32, align 4
22 // CHECK-NEXT: [[REF:%.*]] = alloca i16*, align 8
23 // CHECK-NEXT: [[S:%.*]] = alloca i16, align 2
24 // CHECK-NEXT: store i8*
25 // CHECK-NEXT: store i32
26
27 // Capture the bounds.
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070028 // CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[N]], align 4
John McCallbc8d40d2011-06-24 21:55:10 +000029 // CHECK-NEXT: [[DIM0:%.*]] = zext i32 [[T0]] to i64
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070030 // CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[N]], align 4
John McCallbc8d40d2011-06-24 21:55:10 +000031 // CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], 1
32 // CHECK-NEXT: [[DIM1:%.*]] = zext i32 [[T1]] to i64
33 typedef short array_t[n][n+1];
34
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070035 // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[ARRAY]], align 8
John McCallbc8d40d2011-06-24 21:55:10 +000036 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to i16*
37 // CHECK-NEXT: store i16* [[T1]], i16** [[REF]], align 8
38 array_t &ref = *(array_t*) array;
39
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070040 // CHECK-NEXT: [[T0:%.*]] = load i16*, i16** [[REF]]
John McCall913dab22011-06-25 01:32:37 +000041 // CHECK-NEXT: [[T1:%.*]] = mul nsw i64 1, [[DIM1]]
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070042 // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds i16, i16* [[T0]], i64 [[T1]]
43 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i16, i16* [[T2]], i64 2
John McCallbc8d40d2011-06-24 21:55:10 +000044 // CHECK-NEXT: store i16 3, i16* [[T3]]
45 ref[1][2] = 3;
46
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070047 // CHECK-NEXT: [[T0:%.*]] = load i16*, i16** [[REF]]
John McCall913dab22011-06-25 01:32:37 +000048 // CHECK-NEXT: [[T1:%.*]] = mul nsw i64 4, [[DIM1]]
Pirama Arumuga Nainar3ea9e332015-04-08 08:57:32 -070049 // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds i16, i16* [[T0]], i64 [[T1]]
50 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i16, i16* [[T2]], i64 5
51 // CHECK-NEXT: [[T4:%.*]] = load i16, i16* [[T3]]
John McCallbc8d40d2011-06-24 21:55:10 +000052 // CHECK-NEXT: store i16 [[T4]], i16* [[S]], align 2
53 short s = ref[4][5];
54
55 // CHECK-NEXT: ret void
56}