- ab13751 Add ARM cortex-r5 subtarget as available mcpu by Quentin Colombet · 12 years ago
- e72f4d9 Targets.cpp: [cygwin] Add the predefined macro "_X86_", according to newer version of cygwin/w32api. by NAKAMURA Takumi · 12 years ago
- 8a03357 Remove little endian specification from SPIR data layout - SPIR doesn't define endiannes in the data layout. by Guy Benyei · 12 years ago
- 27fa236 Initial support for FreeBSD on ARM. Patch by Andrew Turner. by Rafael Espindola · 12 years ago
- bd5da3c Add SPIR32/SPIR64 targets to Clang by Guy Benyei · 12 years ago
- fff3248 Virtual method overrides can no longer have mismatched calling conventions. This fixes PR14339. by Aaron Ballman · 12 years ago
- 6e399b4 long double should be 64 bits on FreeBSD/MIPS64. It possibly should be on by David Chisnall · 12 years ago
- 441d9f7 Adapt to LLVM commit 169291 which streamlines the usage of NaCl/NativeClient by Eli Bendersky · 12 years ago
- 6e6330c Don't emit a warning with an input/output parameter. We assume the user knows what they're doing here. by Bill Wendling · 12 years ago
- e2dbaa9 Don't warn if the input size is less than the register size. Also don't warn if by Bill Wendling · 12 years ago
- 74632aa Add ARM cortex-a5 subtarget by Quentin Colombet · 12 years ago
- 398b8e8 Revert commit revision r168953, to change the commit message, which was empty by Quentin Colombet · 12 years ago
- b3233f5 by Quentin Colombet · 12 years ago
- 6902e41 Fix the definition of the vfork() builtin on Haiku. PR14378. by Eli Friedman · 12 years ago
- f582499 Add missing "break". Thanks to Craig for spotting it. by Eli Friedman · 12 years ago
- 7baa711 Enable inlining of 4 byte atomic ops on ppc32, 8 byte atomic ops on ppc64. by Benjamin Kramer · 12 years ago
- faf3538 Add missing features for misc x86 CPUs to CPU feature translation. Patch by Jung-uk Kim. by Eli Friedman · 12 years ago
- 612db2a Clean up X86 target feature translation code slightly. No intended functional change. Patch by Jung-uk Kim. by Eli Friedman · 12 years ago
- 49a8754 Since CreateTargetInfo is taking ownership of the target options, pass by Douglas Gregor · 12 years ago
- 825d386 Remove the cellspu port. by Eric Christopher · 12 years ago
- f634bdf The register constraint could mean a 16- or 8-bit register. by Bill Wendling · 12 years ago
- 68fd608 Check that the input size is correct for the given constraint. by Bill Wendling · 12 years ago
- 463eb89 Add clang support of RTM from TSX by Michael Liao · 12 years ago
- ef7bcea Set TLSSupported to false on Haiku. by Benjamin Kramer · 12 years ago
- ca1b62a Rename LangOptions members for address sanitizer and thread sanitizer from by Richard Smith · 12 years ago
- dbaf4bc This patch adds alignment information for long double to the 64-bit PowerPC by Bill Schmidt · 12 years ago
- 50d46ca Recommit Eric's code to validate ASM string's constraints and modifiers. by Bill Wendling · 12 years ago
- b16abb1 Modify the targets to set appropriate calling convention defaults and C variables when using a gnueabihf or aapcs-vfp target. by David Tweed · 12 years ago
- c6cd9af Revert r166647 to rethink the patch... by Bill Wendling · 12 years ago
- a0b9ce0 Add some support for diagnosing possibly mismatched constraint, type size and by Bill Wendling · 12 years ago
- 4d3ee9b Fix pre-commit refacto failure. by Daniel Dunbar · 12 years ago
- 849289e driver/Darwin: Follow up to last patch, M-class CPUs are AAPCS but not EABI. by Daniel Dunbar · 12 years ago
- 57016dd Serialize TargetOptions into an AST file, and make sure that we keep by Douglas Gregor · 12 years ago
- 263366f Add pnaclcall convention to Native Client targets. by Derek Schuff · 12 years ago
- 9a022bb Teach TargetInfo to hold on to the TargetOptions with which it was created. by Douglas Gregor · 12 years ago
- 6505a29 Add TargetInfo for r600. by Eli Friedman · 12 years ago
- 7da46f9 Properly factor Native Client defines to support NaCl as an OS by Derek Schuff · 12 years ago
- babaf31 Make X86_64ABIInfo clean for ABIs with 32 bit pointers, such as X32 by Derek Schuff · 12 years ago
- 146e5a4 X86: add F16C support in Clang by Manman Ren · 12 years ago
- eae5a820 Fix PR 11709: Change the definition of va_list to meet AAPCS requirement by Logan Chien · 12 years ago
- 82bfa19 Allowing individual targets to determine whether a given calling convention is allowed or ignored with warning. This allows for correct name mangling for x64 targets on Windows, which in turn allows for linking against the Win32 APIs. by Aaron Ballman · 12 years ago
- cfaab00 Add ARM VFPv4 feature and enable it by default for Swift. by Bob Wilson · 12 years ago
- 336bfa3 Add armv7s and some other arm variants supported by Mach-O files. by Bob Wilson · 12 years ago
- 087c65f Disable source fortification on Darwin with AddressSanitizer. by Alexander Potapenko · 12 years ago
- 7de3296 Add e500mc and e5500 to the list of valid PPC CPU names. by Hal Finkel · 12 years ago
- 2df67ea This patch introduces A15 as a target in Clang. by Silviu Baranga · 12 years ago
- 8b0703d Do not construct StringRef from NULL argument. by Anton Korobeynikov · 12 years ago
- 70a5cca Provide some ACLE C defines. This should fix PR13796 by Anton Korobeynikov · 12 years ago
- 94a7142 Rename ANDROIDEABI to Android. by Logan Chien · 12 years ago
- 600a513 Define __mips64 / __mips64__ macros for MIPS 64-bit targets. by Simon Atanasyan · 12 years ago
- 1d8ae1d Use getTargetDefines() virtual function in MipsTargetInfoBase successors by Simon Atanasyan · 12 years ago
- d4935a0 Factor out MIPS macro definitions common for all MIPS targets. by Simon Atanasyan · 12 years ago
- 260e506 Define _MIPS_ARCH and _MIPS_ARCH_<cpu name> macros for MIPS targets. by Simon Atanasyan · 12 years ago
- 8c019df Remove FIXME, the constraints contain more options than the by Eric Christopher · 12 years ago
- a0dfca1 Add a missing 'break' to ensure that we reject inline assembly by Eric Christopher · 12 years ago
- 6bd3291 Frontend: define _LP64 in a target-independent way by Dylan Noblesmith · 12 years ago
- 42f74f2 clang support for Bitrig (an OpenBSD fork); patch by David Hill. by Eli Friedman · 12 years ago
- f0e956b Revert part of r161175 which was wrong for OpenBSD's PowerPC target. by Hans Wennborg · 12 years ago
- 5e601dc Add OpenBSD arch targets for powerpc, arm, mips64, mips64el and sparc. by Hans Wennborg · 12 years ago
- e48667f TLS is not supported on OpenBSD by Hans Wennborg · 12 years ago
- f9e9af7 Add a per target max vector alignment field (e.g., 32-byte alignment for x86 due to by Chad Rosier · 12 years ago
- 9903e94 Fix handling of curly braces in NVPTX inline asm by Justin Holewinski · 12 years ago
- 84f3080 Wire up -mrdrnd for X86. by Benjamin Kramer · 12 years ago
- 1c9ae1c Remove unreachable default case to pacify clang's -Wcovered-switch-default. by Benjamin Kramer · 12 years ago
- a1b6227 MIPS: Define __mips_dsp_rev / __mips_dspr2 / __mips_dsp macros by Simon Atanasyan · 12 years ago
- d797a85 MIPS: Add -mdsp/-mno-dsp and -mdspr2/-mno-dspr2 command line options support. by Simon Atanasyan · 12 years ago
- 1176bcd MIPS: Define __mips16 macro if -mips16 option is provided. by Simon Atanasyan · 12 years ago
- bbd9916 MIPS: Replace the pair of boolean flags by enumeration to hold selected float ABI. by Simon Atanasyan · 12 years ago
- 0b273ef MIPS: Add -mips16 / -mno-mips16 command line support. by Simon Atanasyan · 12 years ago
- 39d5fa1 Add additional architecture defines for PPC targets. by Hal Finkel · 12 years ago
- fbf7005 Support MIPS DSP Rev1 intrinsics. by Simon Atanasyan · 12 years ago
- c5613b2 Explicitly build __builtin_va_list. by Meador Inge · 12 years ago
- 02a8427 Add PPC support for translating gcc-style -mcpu options into LLVM -target-cpu options. by Hal Finkel · 12 years ago
- b6af69e Add XOP feature flag. by Craig Topper · 12 years ago
- 3dbcc88 Mips: Define __mips_hard_float macro additional to __mips_single_float by Simon Atanasyan · 12 years ago
- 31380fb Make disabling SSE levels also disable AVX and FMA. by Craig Topper · 12 years ago
- a7463c3 Make AES and PCLMUL features imply SSE2 as that's needed to get the right types defined. by Craig Topper · 12 years ago
- 2ae9507 Add fma feature flag for Intel FMA instructions. by Craig Topper · 12 years ago
- 3c0bc15 Add builtin for pclmulqdq instruction. by Craig Topper · 12 years ago
- 90ea036 SSE4A should not imply LZCNT and POPCNT. FMA4 should imply SSE4A. Add missing break at the end of btver1 feature list. by Craig Topper · 12 years ago
- 4dfa5ad Define __SSE4A__ when targeting new AMD CPUs. by Benjamin Kramer · 12 years ago
- 2ae3a47 Sparc is bigendian. by Roman Divacky · 12 years ago
- 2c585b9 Replace PTX back-end with NVPTX back-end in all places where Clang cares by Justin Holewinski · 12 years ago
- edb66f3 Teach Clang about the NVPTX backend. by Peter Collingbourne · 12 years ago
- 4dc34eb CUDA: add CodeGen support for global variable address spaces. by Peter Collingbourne · 12 years ago
- 5f9688b Hexagon V5 FP support. by Sirish Pande · 12 years ago
- 70d9b16 Enable AVX on AMD Bulldozer processors. by Craig Topper · 12 years ago
- 3206403 Define __ANDROID__ macro on -androideabi targets. by Evgeniy Stepanov · 12 years ago
- fd93630 Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. by Craig Topper · 12 years ago
- 4ddcf3b OpenBSD: Remove incorrect -pthread preprocessor define _POSIX_THREADS and replace by Chris Lattner · 12 years ago
- 6603ff8 Revert r155363, due to the underlying patches in LLVM causing regression by Chandler Carruth · 12 years ago
- ac28eca Hexagon V5 (floating point) support in cfe. by Sirish Pande · 12 years ago
- 103f41d Revert some Hexagon builtin commits to match reverts done to LLVM in by Chandler Carruth · 12 years ago
- 8b2a5d2 MIPS: Followup to r154606. Expand list of accepted MIPS target features in the MipsTargetInfoBase::setFeatureEnabled() routine. by Simon Atanasyan · 12 years ago
- 7ac715f Hexagon V5(Floating Point) support. by Sirish Pande · 12 years ago
- 10e1629d MIPS: Initialize MIPS CPU's name by default value. by Simon Atanasyan · 12 years ago
- 9091389 Move some MIPS target macro definitions from class Mips32TargetInfoBase by Simon Atanasyan · 12 years ago
- 7a938fa [driver] Create a new -mfpmath= option, which is used to control whether clang by Chad Rosier · 12 years ago
- 0ea6164 Add more constraint registers for mips. by Eric Christopher · 12 years ago
- 6903313 ARM backend knows about cortex-m4. The front end should too. by Jim Grosbach · 12 years ago