Edward O'Callaghan | 2bf6272 | 2009-08-05 04:02:56 +0000 | [diff] [blame] | 1 | /* ===-- clear_cache.c - Implement __clear_cache ---------------------------=== |
| 2 | * |
| 3 | * The LLVM Compiler Infrastructure |
| 4 | * |
| 5 | * This file is distributed under the University of Illinois Open Source |
| 6 | * License. See LICENSE.TXT for details. |
| 7 | * |
| 8 | * ===----------------------------------------------------------------------=== |
| 9 | */ |
Daniel Dunbar | b3a6901 | 2009-06-26 16:47:03 +0000 | [diff] [blame] | 10 | |
| 11 | #include <stdlib.h> |
| 12 | |
| 13 | #if __APPLE__ |
| 14 | #include <libkern/OSCacheControl.h> |
| 15 | #endif |
| 16 | |
Edward O'Callaghan | 2bf6272 | 2009-08-05 04:02:56 +0000 | [diff] [blame] | 17 | /* |
| 18 | * The compiler generates calls to __clear_cache() when creating |
| 19 | * trampoline functions on the stack for use with nested functions. |
| 20 | * It is expected to invalidate the instruction cache for the |
| 21 | * specified range. |
| 22 | */ |
| 23 | |
Daniel Dunbar | b3a6901 | 2009-06-26 16:47:03 +0000 | [diff] [blame] | 24 | void __clear_cache(void* start, void* end) |
| 25 | { |
| 26 | #if __i386__ || __x86_64__ |
Edward O'Callaghan | 2bf6272 | 2009-08-05 04:02:56 +0000 | [diff] [blame] | 27 | /* |
| 28 | * Intel processors have a unified instruction and data cache |
| 29 | * so there is nothing to do |
| 30 | */ |
Daniel Dunbar | b3a6901 | 2009-06-26 16:47:03 +0000 | [diff] [blame] | 31 | #else |
| 32 | #if __APPLE__ |
Edward O'Callaghan | 2bf6272 | 2009-08-05 04:02:56 +0000 | [diff] [blame] | 33 | /* On Darwin, sys_icache_invalidate() provides this functionality */ |
Daniel Dunbar | b3a6901 | 2009-06-26 16:47:03 +0000 | [diff] [blame] | 34 | sys_icache_invalidate(start, end-start); |
| 35 | #else |
Daniel Dunbar | 48f46ac | 2010-03-31 17:00:45 +0000 | [diff] [blame^] | 36 | compilerrt_abort(); |
Daniel Dunbar | b3a6901 | 2009-06-26 16:47:03 +0000 | [diff] [blame] | 37 | #endif |
| 38 | #endif |
| 39 | } |
| 40 | |