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Jens Axboeebac4652005-12-08 15:25:21 +01001#ifndef ARCH_PPC_H
2#define ARCH_PPH_H
3
4#define ARCH (arch_ppc)
5
6#ifndef __NR_ioprio_set
7#define __NR_ioprio_set 273
8#define __NR_ioprio_get 274
9#endif
10
11#ifndef __NR_fadvise64
12#define __NR_fadvise64 233
13#endif
14
Jens Axboe8756e4d2006-05-27 20:24:53 +020015#ifndef __NR_sys_splice
16#define __NR_sys_splice 283
17#define __NR_sys_tee 284
18#define __NR_sys_vmsplice 285
19#endif
20
Jens Axboeebac4652005-12-08 15:25:21 +010021#define nop do { } while (0)
22
Jens Axboedb6defc2007-12-11 08:55:53 +010023#ifdef __powerpc64__
Jens Axboe44c47fe2008-06-04 14:31:25 +020024#define read_barrier() __asm__ __volatile__ ("lwsync" : : : "memory")
Jens Axboedb6defc2007-12-11 08:55:53 +010025#else
Jens Axboe44c47fe2008-06-04 14:31:25 +020026#define read_barrier() __asm__ __volatile__ ("sync" : : : "memory")
Jens Axboedb6defc2007-12-11 08:55:53 +010027#endif
28
Jens Axboe44c47fe2008-06-04 14:31:25 +020029#define write_barrier() __asm__ __volatile__ ("sync" : : : "memory")
30
Jens Axboe8f7e39d2008-06-01 19:45:10 +020031static inline int __ilog2(unsigned long bitmask)
32{
33 int lz;
34
35 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (bitmask));
36 return 31 - lz;
37}
38
39static inline int arch_ffz(unsigned long bitmask)
40{
41 if ((bitmask = ~bitmask) == 0)
42 return 32;
43 return __ilog2(bitmask & -bitmask);
44}
Cigy Cyriac5f39d8f2010-08-10 19:18:11 -040045
46static inline unsigned long long get_cpu_clock(void)
47{
48 unsigned int tbl, tbu0, tbu1;
49 unsigned long long ret;
50
51 do {
52 __asm__ __volatile__ ("mftbu %0" : "=r"(tbu0));
53 __asm__ __volatile__ ("mftb %0" : "=r"(tbl) );
54 __asm__ __volatile__ ("mftbu %0" : "=r"(tbu1));
55 } while (tbu0 != tbu1);
56
57 ret = (((unsigned long long)tbu0) << 32) | tbl;
58 return ret;
59}
60
Jens Axboe8f7e39d2008-06-01 19:45:10 +020061#define ARCH_HAVE_FFZ
Cigy Cyriac5f39d8f2010-08-10 19:18:11 -040062#define ARCH_HAVE_CPU_CLOCK
Jens Axboe8f7e39d2008-06-01 19:45:10 +020063
Jens Axboeebac4652005-12-08 15:25:21 +010064#endif