commit 24348847b93337ad548032e046c71f37e647da26
author Johnny Chen <johnny.chen@apple.com> Wed Feb 23 00:15:56 2011 +0000
committer Johnny Chen <johnny.chen@apple.com> Wed Feb 23 00:15:56 2011 +0000
tree 8280cb5906e28a2f022cd0e858a4225fb4372bd7
parent 90e607bfccc74572e8422ea85d20f10db6f936b9

Renamed macro definition of CPSR_C to be CPSR_C_POS to avoid confusions and subtle bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvdb/trunk@126271 91177308-0d34-0410-b5e6-96231b3b80d8

source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index 216c7b3..491cdad 100644
--- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -24,8 +24,8 @@
 using namespace lldb_private;
 
 // Convenient macro definitions.
-#define APSR_C Bit32(m_inst_cpsr, CPSR_C)
-#define APSR_V Bit32(m_inst_cpsr, CPSR_V)
+#define APSR_C Bit32(m_inst_cpsr, CPSR_C_POS)
+#define APSR_V Bit32(m_inst_cpsr, CPSR_V_POS)
 
 #define AlignPC(pc_val) (pc_val & 0xFFFFFFFC)
 
@@ -7226,12 +7226,12 @@
                                    const uint32_t overflow)
 {
     m_new_inst_cpsr = m_inst_cpsr;
-    SetBit32(m_new_inst_cpsr, CPSR_N, Bit32(result, CPSR_N));
-    SetBit32(m_new_inst_cpsr, CPSR_Z, result == 0 ? 1 : 0);
+    SetBit32(m_new_inst_cpsr, CPSR_N_POS, Bit32(result, CPSR_N_POS));
+    SetBit32(m_new_inst_cpsr, CPSR_Z_POS, result == 0 ? 1 : 0);
     if (carry != ~0u)
-        SetBit32(m_new_inst_cpsr, CPSR_C, carry);
+        SetBit32(m_new_inst_cpsr, CPSR_C_POS, carry);
     if (overflow != ~0u)
-        SetBit32(m_new_inst_cpsr, CPSR_V, overflow);
+        SetBit32(m_new_inst_cpsr, CPSR_V_POS, overflow);
     if (m_new_inst_cpsr != m_inst_cpsr)
     {
         if (!WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, m_new_inst_cpsr))

source/Plugins/Process/Utility/ARMDefines.h

diff --git a/source/Plugins/Process/Utility/ARMDefines.h b/source/Plugins/Process/Utility/ARMDefines.h
index 9a4dcc1..0ef8c61 100644
--- a/source/Plugins/Process/Utility/ARMDefines.h
+++ b/source/Plugins/Process/Utility/ARMDefines.h
@@ -67,32 +67,32 @@
 }
 
 // Bit positions for CPSR
-#define CPSR_T  5
-#define CPSR_F  6
-#define CPSR_I  7
-#define CPSR_A  8
-#define CPSR_E  9
-#define CPSR_J 24
-#define CPSR_Q 27
-#define CPSR_V 28
-#define CPSR_C 29
-#define CPSR_Z 30
-#define CPSR_N 31
+#define CPSR_T_POS  5
+#define CPSR_F_POS  6
+#define CPSR_I_POS  7
+#define CPSR_A_POS  8
+#define CPSR_E_POS  9
+#define CPSR_J_POS 24
+#define CPSR_Q_POS 27
+#define CPSR_V_POS 28
+#define CPSR_C_POS 29
+#define CPSR_Z_POS 30
+#define CPSR_N_POS 31
 
 // Masks for CPSR
 #define MASK_CPSR_MODE_MASK     (0x0000001fu)
-#define MASK_CPSR_T         (1u << CPSR_T)
-#define MASK_CPSR_F         (1u << CPSR_F)
-#define MASK_CPSR_I         (1u << CPSR_I)
-#define MASK_CPSR_A         (1u << CPSR_A)
-#define MASK_CPSR_E         (1u << CPSR_E)
+#define MASK_CPSR_T         (1u << CPSR_T_POS)
+#define MASK_CPSR_F         (1u << CPSR_F_POS)
+#define MASK_CPSR_I         (1u << CPSR_I_POS)
+#define MASK_CPSR_A         (1u << CPSR_A_POS)
+#define MASK_CPSR_E         (1u << CPSR_E_POS)
 #define MASK_CPSR_GE_MASK   (0x000f0000u)
-#define MASK_CPSR_J         (1u << CPSR_J)
-#define MASK_CPSR_Q         (1u << CPSR_Q)
-#define MASK_CPSR_V         (1u << CPSR_V)
-#define MASK_CPSR_C         (1u << CPSR_C)
-#define MASK_CPSR_Z         (1u << CPSR_Z)
-#define MASK_CPSR_N         (1u << CPSR_N)
+#define MASK_CPSR_J         (1u << CPSR_J_POS)
+#define MASK_CPSR_Q         (1u << CPSR_Q_POS)
+#define MASK_CPSR_V         (1u << CPSR_V_POS)
+#define MASK_CPSR_C         (1u << CPSR_C_POS)
+#define MASK_CPSR_Z         (1u << CPSR_Z_POS)
+#define MASK_CPSR_N         (1u << CPSR_N_POS)
 
 }   // namespace lldb_private