| commit | 538d3054100ed53ffc78f382296e35505f4aa946 | [log] [tgz] |
|---|---|---|
| author | Ashok Thirumurthi <ashok.thirumurthi@intel.com> | Tue Apr 23 20:50:34 2013 +0000 |
| committer | Ashok Thirumurthi <ashok.thirumurthi@intel.com> | Tue Apr 23 20:50:34 2013 +0000 |
| tree | e489668f70c12d06456b31dbd4268e64cdb5f083 | |
| parent | e34ed406b17376636741d1888734375bfc39ba08 [diff] |
Added 64-bit POSIX support to write floating-point vector registers.
- Includes tests that write, read and verify vector register content.
Reviewed by: Daniel Malea
git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@180143 91177308-0d34-0410-b5e6-96231b3b80d8