commit 538d3054100ed53ffc78f382296e35505f4aa946
author Ashok Thirumurthi <ashok.thirumurthi@intel.com> Tue Apr 23 20:50:34 2013 +0000
committer Ashok Thirumurthi <ashok.thirumurthi@intel.com> Tue Apr 23 20:50:34 2013 +0000
tree e489668f70c12d06456b31dbd4268e64cdb5f083
parent e34ed406b17376636741d1888734375bfc39ba08

Added 64-bit POSIX support to write floating-point vector registers.
- Includes tests that write, read and verify vector register content.
            
Reviewed by: Daniel Malea


git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@180143 91177308-0d34-0410-b5e6-96231b3b80d8

source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp

diff --git a/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp b/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
index 7fc6426..d26fd5e 100644
--- a/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
+++ b/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
@@ -698,7 +698,15 @@
         switch (reg)
         {
         default:
-            return false;
+            if (reg_info->encoding != eEncodingVector)
+                return false;
+
+            if (reg >= fpu_stmm0 && reg <= fpu_stmm7)
+               ::memcpy (user.i387.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
+            
+            if (reg >= fpu_xmm0 && reg <= fpu_xmm15)
+               ::memcpy (user.i387.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
+            break;
         case fpu_dp:
             user.i387.dp = value.GetAsUInt64();
             break;

test/functionalities/register/TestRegisters.py

diff --git a/test/functionalities/register/TestRegisters.py b/test/functionalities/register/TestRegisters.py
index c34f672..52fa9ab 100644
--- a/test/functionalities/register/TestRegisters.py
+++ b/test/functionalities/register/TestRegisters.py
@@ -91,6 +91,14 @@
         self.expect("register read " + register,
             substrs = [register + ' = 0x'])
 
+    def vector_write_and_read(self, frame, register, new_value):
+        value = frame.FindValue(register, lldb.eValueTypeRegister)
+        self.assertTrue(value.IsValid(), "finding a value for register " + register)
+
+        self.runCmd("register write " + register + " \'" + new_value + "\'")
+        self.expect("register read " + register,
+            substrs = [register + ' = ', new_value])
+
     def fp_register_write(self):
         exe = os.path.join(os.getcwd(), "a.out")
 
@@ -121,7 +129,16 @@
         self.write_and_restore(currentFrame, "mxcsr")
         self.write_and_restore(currentFrame, "mxcsrmask")
 
-    @expectedFailureLinux # bugzilla 14661 - Expressions involving XMM registers fail on Linux
+        new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00}"
+        self.vector_write_and_read(currentFrame, "stmm0", new_value)
+        new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a}"
+        self.vector_write_and_read(currentFrame, "stmm7", new_value)
+
+        new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}"
+        self.vector_write_and_read(currentFrame, "xmm0", new_value)
+        new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}"
+        self.vector_write_and_read(currentFrame, "xmm15", new_value)
+
     def register_expressions(self):
         """Test expression evaluation with commands related to registers."""
         self.common_setup()