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Chris Lattner24943d22010-06-08 16:52:24 +00001//===-- DWARFCallFrameInfo.cpp ----------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10
11// C Includes
12// C++ Includes
13#include <list>
14
15// Other libraries and framework includes
16// Project includes
17#include "lldb/Symbol/DWARFCallFrameInfo.h"
18#include "lldb/Core/ArchSpec.h"
19#include "lldb/Core/Module.h"
20#include "lldb/Symbol/ObjectFile.h"
21#include "lldb/Target/RegisterContext.h"
22#include "lldb/Core/Section.h"
23#include "lldb/Target/Thread.h"
24
25using namespace lldb;
26using namespace lldb_private;
27
28static void
29DumpRegisterName (Stream *s, Thread *thread, const ArchSpec *arch, uint32_t reg_kind, uint32_t reg_num)
30{
31 const char *reg_name = NULL;
32 RegisterContext *reg_ctx = NULL;
33 if (thread)
34 {
35 reg_ctx = thread->GetRegisterContext();
36 if (reg_ctx)
37 reg_name = reg_ctx->GetRegisterName (reg_ctx->ConvertRegisterKindToRegisterNumber (reg_kind, reg_num));
38 }
39
40 if (reg_name == NULL && arch != NULL)
41 {
42 switch (reg_kind)
43 {
44 case eRegisterKindDWARF: reg_name = arch->GetRegisterName(reg_num, eRegisterKindDWARF); break;
45 case eRegisterKindGCC: reg_name = arch->GetRegisterName(reg_num, eRegisterKindGCC); break;
46 default:
47 break;
48 }
49 }
50
51 if (reg_name)
52 s->PutCString(reg_name);
53 else
54 {
55 const char *reg_kind_name = NULL;
56 switch (reg_kind)
57 {
58 case eRegisterKindDWARF: reg_kind_name = "dwarf-reg"; break;
59 case eRegisterKindGCC: reg_kind_name = "compiler-reg"; break;
60 case eRegisterKindGeneric: reg_kind_name = "generic-reg"; break;
61 default:
62 break;
63 }
64 if (reg_kind_name)
65 s->Printf("%s(%u)", reg_kind_name, reg_num);
66 else
67 s->Printf("reg(%d.%u)", reg_kind, reg_num);
68 }
69}
70
71
72#pragma mark DWARFCallFrameInfo::RegisterLocation
73
74DWARFCallFrameInfo::RegisterLocation::RegisterLocation() :
75 m_type(isSame)
76{
77}
78
79
80bool
81DWARFCallFrameInfo::RegisterLocation::operator == (const DWARFCallFrameInfo::RegisterLocation& rhs) const
82{
83 if (m_type != rhs.m_type)
84 return false;
85 switch (m_type)
86 {
87 case unspecified:
88 case isUndefined:
89 case isSame:
90 return true;
91
92 case atCFAPlusOffset:
93 return m_location.offset == rhs.m_location.offset;
94
95 case isCFAPlusOffset:
96 return m_location.offset == rhs.m_location.offset;
97
98 case inOtherRegister:
99 return m_location.reg_num == rhs.m_location.reg_num;
100
101 default:
102 break;
103 }
104 return false;
105}
106
107void
108DWARFCallFrameInfo::RegisterLocation::SetUnspecified()
109{
110 m_type = unspecified;
111}
112
113void
114DWARFCallFrameInfo::RegisterLocation::SetUndefined()
115{
116 m_type = isUndefined;
117}
118
119void
120DWARFCallFrameInfo::RegisterLocation::SetSame()
121{
122 m_type = isSame;
123}
124
125void
126DWARFCallFrameInfo::RegisterLocation::SetAtCFAPlusOffset(int64_t offset)
127{
128 m_type = atCFAPlusOffset;
129 m_location.offset = offset;
130}
131
132void
133DWARFCallFrameInfo::RegisterLocation::SetIsCFAPlusOffset(int64_t offset)
134{
135 m_type = isCFAPlusOffset;
136 m_location.offset = offset;
137}
138
139void
140DWARFCallFrameInfo::RegisterLocation::SetInRegister (uint32_t reg_num)
141{
142 m_type = inOtherRegister;
143 m_location.reg_num = reg_num;
144}
145
146void
147DWARFCallFrameInfo::RegisterLocation::SetAtDWARFExpression(const uint8_t *opcodes, uint32_t len)
148{
149 m_type = atDWARFExpression;
150 m_location.expr.opcodes = opcodes;
151 m_location.expr.length = len;
152}
153
154void
155DWARFCallFrameInfo::RegisterLocation::SetIsDWARFExpression(const uint8_t *opcodes, uint32_t len)
156{
157 m_type = isDWARFExpression;
158 m_location.expr.opcodes = opcodes;
159 m_location.expr.length = len;
160}
161
162void
163DWARFCallFrameInfo::RegisterLocation::Dump(Stream *s, const DWARFCallFrameInfo &cfi, Thread *thread, const Row *row, uint32_t reg_num) const
164{
165 const ArchSpec *arch = cfi.GetArchitecture();
166 const uint32_t reg_kind = cfi.GetRegisterKind();
167
168 DumpRegisterName (s, thread, arch, reg_kind, reg_num);
169 s->PutChar('=');
170
171 switch (m_type)
172 {
173 case unspecified:
174 s->PutChar('?');
175 break;
176
177 case isUndefined:
178 s->PutCString("undefined");
179 break;
180
181 case isSame:
182 s->PutCString("same");
183 break;
184
185 case atCFAPlusOffset:
186 s->PutChar('[');
187 // Fall through to isCFAPlusOffset...
188 case isCFAPlusOffset:
189 {
190 DumpRegisterName (s, thread, arch, reg_kind, row->GetCFARegister());
191 int32_t offset = row->GetCFAOffset() + m_location.offset;
192 if (offset != 0)
193 s->Printf("%-+d", offset);
194 if (m_type == atCFAPlusOffset)
195 s->PutChar(']');
196 }
197 break;
198
199 case inOtherRegister:
200 DumpRegisterName (s, thread, arch, reg_kind, m_location.reg_num);
201 break;
202
203 case atDWARFExpression:
204 s->PutCString("[EXPR] ");
205 break;
206
207 case isDWARFExpression:
208 s->PutCString("EXPR ");
209 break;
210 }
211}
212
213
214#pragma mark DWARFCallFrameInfo::Row
215
216DWARFCallFrameInfo::Row::Row() :
217 m_offset(0),
218 m_cfa_reg_num(0),
219 m_cfa_offset(0),
220 m_register_locations()
221{
222}
223
224DWARFCallFrameInfo::Row::~Row()
225{
226}
227
228void
229DWARFCallFrameInfo::Row::Clear()
230{
231 m_register_locations.clear();
232}
233bool
234DWARFCallFrameInfo::Row::GetRegisterInfo (uint32_t reg_num, DWARFCallFrameInfo::RegisterLocation& register_location) const
235{
236 collection::const_iterator pos = m_register_locations.find(reg_num);
237 if (pos != m_register_locations.end())
238 {
239 register_location = pos->second;
240 return true;
241 }
242 return false;
243}
244
245void
246DWARFCallFrameInfo::Row::SetRegisterInfo (uint32_t reg_num, const RegisterLocation& register_location)
247{
248 m_register_locations[reg_num] = register_location;
249}
250
251
252void
253DWARFCallFrameInfo::Row::Dump(Stream* s, const DWARFCallFrameInfo &cfi, Thread *thread, lldb::addr_t base_addr) const
254{
255 const ArchSpec *arch = cfi.GetArchitecture();
256 const uint32_t reg_kind = cfi.GetRegisterKind();
257 collection::const_iterator pos, end = m_register_locations.end();
258 s->Indent();
259 s->Printf("0x%16.16llx: CFA=", m_offset + base_addr);
260 DumpRegisterName(s, thread, arch, reg_kind, m_cfa_reg_num);
261 if (m_cfa_offset != 0)
262 s->Printf("%-+lld", m_cfa_offset);
263
264 for (pos = m_register_locations.begin(); pos != end; ++pos)
265 {
266 s->PutChar(' ');
267 pos->second.Dump(s, cfi, thread, this, pos->first);
268 }
269 s->EOL();
270}
271
272
273#pragma mark DWARFCallFrameInfo::FDE
274
275
276DWARFCallFrameInfo::FDE::FDE (dw_offset_t offset, const AddressRange &range) :
277 m_fde_offset (offset),
278 m_range (range),
279 m_row_list ()
280{
281}
282
283DWARFCallFrameInfo::FDE::~FDE()
284{
285}
286
287void
288DWARFCallFrameInfo::FDE::AppendRow (const Row &row)
289{
290 if (m_row_list.empty() || m_row_list.back().GetOffset() != row.GetOffset())
291 m_row_list.push_back(row);
292 else
293 m_row_list.back() = row;
294}
295
296void
297DWARFCallFrameInfo::FDE::Dump (Stream *s, const DWARFCallFrameInfo &cfi, Thread* thread) const
298{
299 s->Indent();
300 s->Printf("FDE{0x%8.8x} ", m_fde_offset);
301 m_range.Dump(s, NULL, Address::DumpStyleFileAddress);
302 lldb::addr_t fde_base_addr = m_range.GetBaseAddress().GetFileAddress();
303 s->EOL();
304 s->IndentMore();
305 collection::const_iterator pos, end = m_row_list.end();
306 for (pos = m_row_list.begin(); pos != end; ++pos)
307 {
308 pos->Dump(s, cfi, thread, fde_base_addr);
309 }
310 s->IndentLess();
311}
312
313const AddressRange &
314DWARFCallFrameInfo::FDE::GetAddressRange() const
315{
316 return m_range;
317}
318
319bool
320DWARFCallFrameInfo::FDE::IsValidRowIndex (uint32_t idx) const
321{
322 return idx < m_row_list.size();
323}
324
325const DWARFCallFrameInfo::Row&
326DWARFCallFrameInfo::FDE::GetRowAtIndex (uint32_t idx)
327{
328 // You must call IsValidRowIndex(idx) first before calling this!!!
329 return m_row_list[idx];
330}
331#pragma mark DWARFCallFrameInfo::FDEInfo
332
333DWARFCallFrameInfo::FDEInfo::FDEInfo () :
334 fde_offset (0),
335 fde_sp()
336{
337}
338
339DWARFCallFrameInfo::FDEInfo::FDEInfo (off_t offset) :
340 fde_offset(offset),
341 fde_sp()
342{
343}
344
345#pragma mark DWARFCallFrameInfo::CIE
346
347DWARFCallFrameInfo::CIE::CIE(dw_offset_t offset) :
348 cie_offset (offset),
349 version (0),
350 augmentation(),
351 code_align (0),
352 data_align (0),
353 return_addr_reg_num (0),
354 inst_offset (0),
355 inst_length (0),
Jason Molendaccfba722010-07-06 22:38:03 +0000356 ptr_encoding (DW_EH_PE_absptr)
Chris Lattner24943d22010-06-08 16:52:24 +0000357{
358}
359
360
361DWARFCallFrameInfo::CIE::~CIE()
362{
363}
364
365void
366DWARFCallFrameInfo::CIE::Dump(Stream *s, Thread* thread, const ArchSpec *arch, uint32_t reg_kind) const
367{
368 s->Indent();
369 s->Printf("CIE{0x%8.8x} version=%u, code_align=%u, data_align=%d, return_addr_reg=", cie_offset, version, code_align, data_align);
370 DumpRegisterName(s, thread, arch, reg_kind, return_addr_reg_num);
371 s->Printf(", instr_offset=0x%8.8x, instr_length=%u, ptr_encoding=0x%02x\n",
372 inst_offset,
373 inst_length,
374 ptr_encoding);
375}
376
377#pragma mark DWARFCallFrameInfo::CIE
378
379DWARFCallFrameInfo::DWARFCallFrameInfo(ObjectFile *objfile, Section *section, uint32_t reg_kind) :
380 m_objfile (objfile),
381 m_section (section),
382 m_reg_kind (reg_kind), // The flavor of registers that the CFI data uses (One of the defines that starts with "LLDB_REGKIND_")
383 m_cfi_data (),
384 m_cie_map (),
385 m_fde_map ()
386{
387 if (objfile && section)
388 {
389 section->ReadSectionDataFromObjectFile (objfile, m_cfi_data);
390 }
391}
392
393DWARFCallFrameInfo::~DWARFCallFrameInfo()
394{
395}
396
397bool
398DWARFCallFrameInfo::IsEHFrame() const
399{
400 return (m_reg_kind == eRegisterKindGCC);
401}
402
403const ArchSpec *
404DWARFCallFrameInfo::GetArchitecture() const
405{
406 if (m_objfile && m_objfile->GetModule())
407 return &m_objfile->GetModule()->GetArchitecture();
408 return NULL;
409}
410
411uint32_t
412DWARFCallFrameInfo::GetRegisterKind () const
413{
414 return m_reg_kind;
415}
416
417void
418DWARFCallFrameInfo::SetRegisterKind (uint32_t reg_kind)
419{
420 m_reg_kind = reg_kind;
421}
422
423
424
425
426const DWARFCallFrameInfo::CIE*
427DWARFCallFrameInfo::GetCIE(dw_offset_t cie_offset)
428{
429 Index ();
430
431 cie_map_t::iterator pos = m_cie_map.find(cie_offset);
432
433 if (pos != m_cie_map.end())
434 {
435 // Parse and cache the CIE
436 if (pos->second.get() == NULL)
437 pos->second = ParseCIE (cie_offset);
438
439 return pos->second.get();
440 }
441 return NULL;
442}
443
444DWARFCallFrameInfo::CIE::shared_ptr
445DWARFCallFrameInfo::ParseCIE (const dw_offset_t cie_offset)
446{
447 CIE::shared_ptr cie_sp(new CIE(cie_offset));
448 const bool for_eh_frame = IsEHFrame();
449 dw_offset_t offset = cie_offset;
450 const uint32_t length = m_cfi_data.GetU32(&offset);
451 const dw_offset_t cie_id = m_cfi_data.GetU32(&offset);
452 const dw_offset_t end_offset = cie_offset + length + 4;
453 if (length > 0 && (!for_eh_frame && cie_id == 0xfffffffful) || (for_eh_frame && cie_id == 0ul))
454 {
455 size_t i;
456 // cie.offset = cie_offset;
457 // cie.length = length;
458 // cie.cieID = cieID;
Jason Molendaccfba722010-07-06 22:38:03 +0000459 cie_sp->ptr_encoding = DW_EH_PE_absptr;
Chris Lattner24943d22010-06-08 16:52:24 +0000460 cie_sp->version = m_cfi_data.GetU8(&offset);
461
462 for (i=0; i<CFI_AUG_MAX_SIZE; ++i)
463 {
464 cie_sp->augmentation[i] = m_cfi_data.GetU8(&offset);
465 if (cie_sp->augmentation[i] == '\0')
466 {
467 // Zero out remaining bytes in augmentation string
468 for (size_t j = i+1; j<CFI_AUG_MAX_SIZE; ++j)
469 cie_sp->augmentation[j] = '\0';
470
471 break;
472 }
473 }
474
475 if (i == CFI_AUG_MAX_SIZE && cie_sp->augmentation[CFI_AUG_MAX_SIZE-1] != '\0')
476 {
477 fprintf(stderr, "CIE parse error: CIE augmentation string was too large for the fixed sized buffer of %d bytes.\n", CFI_AUG_MAX_SIZE);
478 return cie_sp;
479 }
480 cie_sp->code_align = (uint32_t)m_cfi_data.GetULEB128(&offset);
481 cie_sp->data_align = (int32_t)m_cfi_data.GetSLEB128(&offset);
482 cie_sp->return_addr_reg_num = m_cfi_data.GetU8(&offset);
483
484 if (cie_sp->augmentation[0])
485 {
486 // Get the length of the eh_frame augmentation data
487 // which starts with a ULEB128 length in bytes
488 const size_t aug_data_len = (size_t)m_cfi_data.GetULEB128(&offset);
489 const size_t aug_data_end = offset + aug_data_len;
490 const size_t aug_str_len = strlen(cie_sp->augmentation);
491 // A 'z' may be present as the first character of the string.
492 // If present, the Augmentation Data field shall be present.
493 // The contents of the Augmentation Data shall be intepreted
494 // according to other characters in the Augmentation String.
495 if (cie_sp->augmentation[0] == 'z')
496 {
497 // Extract the Augmentation Data
498 size_t aug_str_idx = 0;
499 for (aug_str_idx = 1; aug_str_idx < aug_str_len; aug_str_idx++)
500 {
501 char aug = cie_sp->augmentation[aug_str_idx];
502 switch (aug)
503 {
504 case 'L':
505 // Indicates the presence of one argument in the
506 // Augmentation Data of the CIE, and a corresponding
507 // argument in the Augmentation Data of the FDE. The
508 // argument in the Augmentation Data of the CIE is
509 // 1-byte and represents the pointer encoding used
510 // for the argument in the Augmentation Data of the
511 // FDE, which is the address of a language-specific
512 // data area (LSDA). The size of the LSDA pointer is
513 // specified by the pointer encoding used.
514 m_cfi_data.GetU8(&offset);
515 break;
516
517 case 'P':
518 // Indicates the presence of two arguments in the
519 // Augmentation Data of the cie_sp-> The first argument
520 // is 1-byte and represents the pointer encoding
521 // used for the second argument, which is the
522 // address of a personality routine handler. The
523 // size of the personality routine pointer is
524 // specified by the pointer encoding used.
525 {
526 uint8_t arg_ptr_encoding = m_cfi_data.GetU8(&offset);
527 m_cfi_data.GetGNUEHPointer(&offset, arg_ptr_encoding, LLDB_INVALID_ADDRESS, LLDB_INVALID_ADDRESS, LLDB_INVALID_ADDRESS);
528 }
529 break;
530
531 case 'R':
532 // A 'R' may be present at any position after the
533 // first character of the string. The Augmentation
534 // Data shall include a 1 byte argument that
535 // represents the pointer encoding for the address
536 // pointers used in the FDE.
537 cie_sp->ptr_encoding = m_cfi_data.GetU8(&offset);
538 break;
539 }
540 }
541 }
542 else if (strcmp(cie_sp->augmentation, "eh") == 0)
543 {
544 // If the Augmentation string has the value "eh", then
545 // the EH Data field shall be present
546 }
547
548 // Set the offset to be the end of the augmentation data just in case
549 // we didn't understand any of the data.
550 offset = (uint32_t)aug_data_end;
551 }
552
553 if (end_offset > offset)
554 {
555 cie_sp->inst_offset = offset;
556 cie_sp->inst_length = end_offset - offset;
557 }
558 }
559
560 return cie_sp;
561}
562
563DWARFCallFrameInfo::FDE::shared_ptr
564DWARFCallFrameInfo::ParseFDE(const dw_offset_t fde_offset)
565{
566 const bool for_eh_frame = IsEHFrame();
567 FDE::shared_ptr fde_sp;
568
569 dw_offset_t offset = fde_offset;
570 const uint32_t length = m_cfi_data.GetU32(&offset);
571 dw_offset_t cie_offset = m_cfi_data.GetU32(&offset);
572 const dw_offset_t end_offset = fde_offset + length + 4;
573
574 // Translate the CIE_id from the eh_frame format, which
575 // is relative to the FDE offset, into a __eh_frame section
576 // offset
577 if (for_eh_frame)
578 cie_offset = offset - (cie_offset + 4);
579
580 const CIE* cie = GetCIE(cie_offset);
581 if (cie)
582 {
583 const lldb::addr_t pc_rel_addr = m_section->GetFileAddress();
584 const lldb::addr_t text_addr = LLDB_INVALID_ADDRESS;
585 const lldb::addr_t data_addr = LLDB_INVALID_ADDRESS;
586 lldb::addr_t range_base = m_cfi_data.GetGNUEHPointer(&offset, cie->ptr_encoding, pc_rel_addr, text_addr, data_addr);
Jason Molendaccfba722010-07-06 22:38:03 +0000587 lldb::addr_t range_len = m_cfi_data.GetGNUEHPointer(&offset, cie->ptr_encoding & DW_EH_PE_MASK_ENCODING, pc_rel_addr, text_addr, data_addr);
Chris Lattner24943d22010-06-08 16:52:24 +0000588
589 if (cie->augmentation[0] == 'z')
590 {
591 uint32_t aug_data_len = (uint32_t)m_cfi_data.GetULEB128(&offset);
592 offset += aug_data_len;
593 }
594
595 AddressRange fde_range (range_base, range_len, m_objfile->GetSectionList ());
596 fde_sp.reset(new FDE(fde_offset, fde_range));
597 if (offset < end_offset)
598 {
599 dw_offset_t fde_instr_offset = offset;
600 uint32_t fde_instr_length = end_offset - offset;
601 if (cie->inst_length > 0)
602 ParseInstructions(cie, fde_sp.get(), cie->inst_offset, cie->inst_length);
603 ParseInstructions(cie, fde_sp.get(), fde_instr_offset, fde_instr_length);
604 }
605 }
606 return fde_sp;
607}
608
609const DWARFCallFrameInfo::FDE *
610DWARFCallFrameInfo::FindFDE(const Address &addr)
611{
612 Index ();
613
614 VMRange find_range(addr.GetFileAddress(), 0);
615 fde_map_t::iterator pos = m_fde_map.lower_bound (find_range);
616 fde_map_t::iterator end = m_fde_map.end();
617
618 if (pos != end)
619 {
620 if (pos->first.Contains(find_range.GetBaseAddress()))
621 {
622 // Parse and cache the FDE if we already haven't
623 if (pos->second.fde_sp.get() == NULL)
624 pos->second.fde_sp = ParseFDE(pos->second.fde_offset);
625
626 return pos->second.fde_sp.get();
627 }
628 }
629 return NULL;
630}
631
632
633void
634DWARFCallFrameInfo::Index ()
635{
636 if (m_flags.IsClear(eFlagParsedIndex))
637 {
638 m_flags.Set (eFlagParsedIndex);
639 const bool for_eh_frame = IsEHFrame();
640 CIE::shared_ptr empty_cie_sp;
641 dw_offset_t offset = 0;
642 // Parse all of the CIEs first since we will need them to be able to
643 // properly parse the FDE addresses due to them possibly having
644 // GNU pointer encodings in their augmentations...
645 while (m_cfi_data.ValidOffsetForDataOfSize(offset, 8))
646 {
647 const dw_offset_t curr_offset = offset;
648 const uint32_t length = m_cfi_data.GetU32(&offset);
649 const dw_offset_t next_offset = offset + length;
650 const dw_offset_t cie_id = m_cfi_data.GetU32(&offset);
651
652 bool is_cie = for_eh_frame ? cie_id == 0 : cie_id == UINT32_MAX;
653 if (is_cie)
654 m_cie_map[curr_offset]= ParseCIE(curr_offset);
655
656 offset = next_offset;
657 }
658
659 // Now go back through and index all FDEs
660 offset = 0;
661 const lldb::addr_t pc_rel_addr = m_section->GetFileAddress();
662 const lldb::addr_t text_addr = LLDB_INVALID_ADDRESS;
663 const lldb::addr_t data_addr = LLDB_INVALID_ADDRESS;
664 while (m_cfi_data.ValidOffsetForDataOfSize(offset, 8))
665 {
666 const dw_offset_t curr_offset = offset;
Greg Claytonbef15832010-07-14 00:18:15 +0000667 const dw_offset_t next_offset = offset + m_cfi_data.GetU32(&offset);
Chris Lattner24943d22010-06-08 16:52:24 +0000668 const dw_offset_t cie_id = m_cfi_data.GetU32(&offset);
669
670 bool is_fde = for_eh_frame ? cie_id != 0 : cie_id != UINT32_MAX;
671 if (is_fde)
672 {
673 dw_offset_t cie_offset;
674 if (for_eh_frame)
675 cie_offset = offset - (cie_id + 4);
676 else
677 cie_offset = cie_id;
678
679 const CIE* cie = GetCIE(cie_offset);
680 assert(cie);
681 lldb::addr_t addr = m_cfi_data.GetGNUEHPointer(&offset, cie->ptr_encoding, pc_rel_addr, text_addr, data_addr);
Jason Molendaccfba722010-07-06 22:38:03 +0000682 lldb::addr_t length = m_cfi_data.GetGNUEHPointer(&offset, cie->ptr_encoding & DW_EH_PE_MASK_ENCODING, pc_rel_addr, text_addr, data_addr);
Chris Lattner24943d22010-06-08 16:52:24 +0000683 m_fde_map[VMRange(addr, addr + length)] = FDEInfo(curr_offset);
684 }
685
686 offset = next_offset;
687 }
688 }
689}
690
691//----------------------------------------------------------------------
692// Parse instructions for a FDE. The initial instruction for the CIE
693// are parsed first, then the instructions for the FDE are parsed
694//----------------------------------------------------------------------
695void
696DWARFCallFrameInfo::ParseInstructions(const CIE *cie, FDE *fde, dw_offset_t instr_offset, uint32_t instr_length)
697{
698 if (cie != NULL && fde == NULL)
699 return;
700
701 uint32_t reg_num = 0;
702 int32_t op_offset = 0;
703 uint32_t tmp_uval32;
704 uint32_t code_align = cie->code_align;
705 int32_t data_align = cie->data_align;
706 typedef std::list<Row> RowStack;
707
708 RowStack row_stack;
709 Row row;
710 if (fde->IsValidRowIndex(0))
711 row = fde->GetRowAtIndex(0);
712
713 dw_offset_t offset = instr_offset;
714 const dw_offset_t end_offset = instr_offset + instr_length;
715 RegisterLocation reg_location;
716 while (m_cfi_data.ValidOffset(offset) && offset < end_offset)
717 {
718 uint8_t inst = m_cfi_data.GetU8(&offset);
719 uint8_t primary_opcode = inst & 0xC0;
720 uint8_t extended_opcode = inst & 0x3F;
721
722 if (primary_opcode)
723 {
724 switch (primary_opcode)
725 {
726 case DW_CFA_advance_loc : // (Row Creation Instruction)
727 { // 0x40 - high 2 bits are 0x1, lower 6 bits are delta
728 // takes a single argument that represents a constant delta. The
729 // required action is to create a new table row with a location
730 // value that is computed by taking the current entry's location
731 // value and adding (delta * code_align). All other
732 // values in the new row are initially identical to the current row.
733 fde->AppendRow(row);
734 row.SlideOffset(extended_opcode * code_align);
735 }
736 break;
737
738 case DW_CFA_offset :
739 { // 0x80 - high 2 bits are 0x2, lower 6 bits are register
740 // takes two arguments: an unsigned LEB128 constant representing a
741 // factored offset and a register number. The required action is to
742 // change the rule for the register indicated by the register number
743 // to be an offset(N) rule with a value of
744 // (N = factored offset * data_align).
745 reg_num = extended_opcode;
746 op_offset = (int32_t)m_cfi_data.GetULEB128(&offset) * data_align;
747 reg_location.SetAtCFAPlusOffset(op_offset);
748 row.SetRegisterInfo (reg_num, reg_location);
749 }
750 break;
751
752 case DW_CFA_restore :
753 { // 0xC0 - high 2 bits are 0x3, lower 6 bits are register
754 // takes a single argument that represents a register number. The
755 // required action is to change the rule for the indicated register
756 // to the rule assigned it by the initial_instructions in the CIE.
757 reg_num = extended_opcode;
758 // We only keep enough register locations around to
759 // unwind what is in our thread, and these are organized
760 // by the register index in that state, so we need to convert our
761 // GCC register number from the EH frame info, to a registe index
762
763 if (fde->IsValidRowIndex(0) && fde->GetRowAtIndex(0).GetRegisterInfo(reg_num, reg_location))
764 row.SetRegisterInfo (reg_num, reg_location);
765 }
766 break;
767 }
768 }
769 else
770 {
771 switch (extended_opcode)
772 {
773 case DW_CFA_nop : // 0x0
774 break;
775
776 case DW_CFA_set_loc : // 0x1 (Row Creation Instruction)
777 {
778 // DW_CFA_set_loc takes a single argument that represents an address.
779 // The required action is to create a new table row using the
780 // specified address as the location. All other values in the new row
781 // are initially identical to the current row. The new location value
782 // should always be greater than the current one.
783 fde->AppendRow(row);
784 row.SetOffset(m_cfi_data.GetPointer(&offset) - fde->GetAddressRange().GetBaseAddress().GetFileAddress());
785 }
786 break;
787
788 case DW_CFA_advance_loc1 : // 0x2 (Row Creation Instruction)
789 {
790 // takes a single uword argument that represents a constant delta.
791 // This instruction is identical to DW_CFA_advance_loc except for the
792 // encoding and size of the delta argument.
793 fde->AppendRow(row);
794 row.SlideOffset (m_cfi_data.GetU8(&offset) * code_align);
795 }
796 break;
797
798 case DW_CFA_advance_loc2 : // 0x3 (Row Creation Instruction)
799 {
800 // takes a single uword argument that represents a constant delta.
801 // This instruction is identical to DW_CFA_advance_loc except for the
802 // encoding and size of the delta argument.
803 fde->AppendRow(row);
804 row.SlideOffset (m_cfi_data.GetU16(&offset) * code_align);
805 }
806 break;
807
808 case DW_CFA_advance_loc4 : // 0x4 (Row Creation Instruction)
809 {
810 // takes a single uword argument that represents a constant delta.
811 // This instruction is identical to DW_CFA_advance_loc except for the
812 // encoding and size of the delta argument.
813 fde->AppendRow(row);
814 row.SlideOffset (m_cfi_data.GetU32(&offset) * code_align);
815 }
816 break;
817
818 case DW_CFA_offset_extended : // 0x5
819 {
820 // takes two unsigned LEB128 arguments representing a register number
821 // and a factored offset. This instruction is identical to DW_CFA_offset
822 // except for the encoding and size of the register argument.
823 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
824 op_offset = (int32_t)m_cfi_data.GetULEB128(&offset) * data_align;
825 reg_location.SetAtCFAPlusOffset(op_offset);
826 row.SetRegisterInfo (reg_num, reg_location);
827 }
828 break;
829
830 case DW_CFA_restore_extended : // 0x6
831 {
832 // takes a single unsigned LEB128 argument that represents a register
833 // number. This instruction is identical to DW_CFA_restore except for
834 // the encoding and size of the register argument.
835 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
836 if (fde->IsValidRowIndex(0) && fde->GetRowAtIndex(0).GetRegisterInfo(reg_num, reg_location))
837 row.SetRegisterInfo (reg_num, reg_location);
838 }
839 break;
840
841 case DW_CFA_undefined : // 0x7
842 {
843 // takes a single unsigned LEB128 argument that represents a register
844 // number. The required action is to set the rule for the specified
845 // register to undefined.
846 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
847 reg_location.SetUndefined();
848 row.SetRegisterInfo (reg_num, reg_location);
849 }
850 break;
851
852 case DW_CFA_same_value : // 0x8
853 {
854 // takes a single unsigned LEB128 argument that represents a register
855 // number. The required action is to set the rule for the specified
856 // register to same value.
857 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
858 reg_location.SetSame();
859 row.SetRegisterInfo (reg_num, reg_location);
860 }
861 break;
862
863 case DW_CFA_register : // 0x9
864 {
865 // takes two unsigned LEB128 arguments representing register numbers.
866 // The required action is to set the rule for the first register to be
867 // the second register.
868
869 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
870 uint32_t other_reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
871 reg_location.SetInRegister(other_reg_num);
872 row.SetRegisterInfo (reg_num, reg_location);
873 }
874 break;
875
876 case DW_CFA_remember_state : // 0xA
877 // These instructions define a stack of information. Encountering the
878 // DW_CFA_remember_state instruction means to save the rules for every
879 // register on the current row on the stack. Encountering the
880 // DW_CFA_restore_state instruction means to pop the set of rules off
881 // the stack and place them in the current row. (This operation is
882 // useful for compilers that move epilogue code into the body of a
883 // function.)
884 row_stack.push_back(row);
885 break;
886
887 case DW_CFA_restore_state : // 0xB
888 // These instructions define a stack of information. Encountering the
889 // DW_CFA_remember_state instruction means to save the rules for every
890 // register on the current row on the stack. Encountering the
891 // DW_CFA_restore_state instruction means to pop the set of rules off
892 // the stack and place them in the current row. (This operation is
893 // useful for compilers that move epilogue code into the body of a
894 // function.)
895 {
896 row = row_stack.back();
897 row_stack.pop_back();
898 }
899 break;
900
901 case DW_CFA_def_cfa : // 0xC (CFA Definition Instruction)
902 {
903 // Takes two unsigned LEB128 operands representing a register
904 // number and a (non-factored) offset. The required action
905 // is to define the current CFA rule to use the provided
906 // register and offset.
907 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
908 op_offset = (int32_t)m_cfi_data.GetULEB128(&offset);
909 row.SetCFARegister (reg_num);
910 row.SetCFAOffset (op_offset);
911 }
912 break;
913
914 case DW_CFA_def_cfa_register : // 0xD (CFA Definition Instruction)
915 {
916 // takes a single unsigned LEB128 argument representing a register
917 // number. The required action is to define the current CFA rule to
918 // use the provided register (but to keep the old offset).
919 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
920 row.SetCFARegister (reg_num);
921 }
922 break;
923
924 case DW_CFA_def_cfa_offset : // 0xE (CFA Definition Instruction)
925 {
926 // Takes a single unsigned LEB128 operand representing a
927 // (non-factored) offset. The required action is to define
928 // the current CFA rule to use the provided offset (but
929 // to keep the old register).
930 op_offset = (int32_t)m_cfi_data.GetULEB128(&offset);
931 row.SetCFAOffset (op_offset);
932 }
933 break;
934
935 case DW_CFA_def_cfa_expression : // 0xF (CFA Definition Instruction)
936 {
937 size_t block_len = (size_t)m_cfi_data.GetULEB128(&offset);
938 offset += (uint32_t)block_len;
939 }
940 break;
941
942 case DW_CFA_expression : // 0x10
943 {
944 // Takes two operands: an unsigned LEB128 value representing
945 // a register number, and a DW_FORM_block value representing a DWARF
946 // expression. The required action is to change the rule for the
947 // register indicated by the register number to be an expression(E)
948 // rule where E is the DWARF expression. That is, the DWARF
949 // expression computes the address. The value of the CFA is
950 // pushed on the DWARF evaluation stack prior to execution of
951 // the DWARF expression.
952 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
953 uint32_t block_len = (uint32_t)m_cfi_data.GetULEB128(&offset);
954 const uint8_t *block_data = (uint8_t *)m_cfi_data.GetData(&offset, block_len);
955
956 reg_location.SetAtDWARFExpression(block_data, block_len);
957 row.SetRegisterInfo (reg_num, reg_location);
958 }
959 break;
960
961 case DW_CFA_offset_extended_sf : // 0x11
962 {
963 // takes two operands: an unsigned LEB128 value representing a
964 // register number and a signed LEB128 factored offset. This
965 // instruction is identical to DW_CFA_offset_extended except
966 //that the second operand is signed and factored.
967 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
968 op_offset = (int32_t)m_cfi_data.GetSLEB128(&offset) * data_align;
969 reg_location.SetAtCFAPlusOffset(op_offset);
970 row.SetRegisterInfo (reg_num, reg_location);
971 }
972 break;
973
974 case DW_CFA_def_cfa_sf : // 0x12 (CFA Definition Instruction)
975 {
976 // Takes two operands: an unsigned LEB128 value representing
977 // a register number and a signed LEB128 factored offset.
978 // This instruction is identical to DW_CFA_def_cfa except
979 // that the second operand is signed and factored.
980 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
981 op_offset = (int32_t)m_cfi_data.GetSLEB128(&offset) * data_align;
982 row.SetCFARegister (reg_num);
983 row.SetCFAOffset (op_offset);
984 }
985 break;
986
987 case DW_CFA_def_cfa_offset_sf : // 0x13 (CFA Definition Instruction)
988 {
989 // takes a signed LEB128 operand representing a factored
990 // offset. This instruction is identical to DW_CFA_def_cfa_offset
991 // except that the operand is signed and factored.
992 op_offset = (int32_t)m_cfi_data.GetSLEB128(&offset) * data_align;
993 row.SetCFAOffset (op_offset);
994 }
995 break;
996
997 case DW_CFA_val_expression : // 0x16
998 {
999 // takes two operands: an unsigned LEB128 value representing a register
1000 // number, and a DW_FORM_block value representing a DWARF expression.
1001 // The required action is to change the rule for the register indicated
1002 // by the register number to be a val_expression(E) rule where E is the
1003 // DWARF expression. That is, the DWARF expression computes the value of
1004 // the given register. The value of the CFA is pushed on the DWARF
1005 // evaluation stack prior to execution of the DWARF expression.
1006 reg_num = (uint32_t)m_cfi_data.GetULEB128(&offset);
1007 uint32_t block_len = (uint32_t)m_cfi_data.GetULEB128(&offset);
1008 const uint8_t* block_data = (uint8_t*)m_cfi_data.GetData(&offset, block_len);
1009//#if defined(__i386__) || defined(__x86_64__)
1010// // The EH frame info for EIP and RIP contains code that looks for traps to
1011// // be a specific type and increments the PC.
1012// // For i386:
1013// // DW_CFA_val_expression where:
1014// // eip = DW_OP_breg6(+28), DW_OP_deref, DW_OP_dup, DW_OP_plus_uconst(0x34),
1015// // DW_OP_deref, DW_OP_swap, DW_OP_plus_uconst(0), DW_OP_deref,
1016// // DW_OP_dup, DW_OP_lit3, DW_OP_ne, DW_OP_swap, DW_OP_lit4, DW_OP_ne,
1017// // DW_OP_and, DW_OP_plus
1018// // This basically does a:
1019// // eip = ucontenxt.mcontext32->gpr.eip;
1020// // if (ucontenxt.mcontext32->exc.trapno != 3 && ucontenxt.mcontext32->exc.trapno != 4)
1021// // eip++;
1022// //
1023// // For x86_64:
1024// // DW_CFA_val_expression where:
1025// // rip = DW_OP_breg3(+48), DW_OP_deref, DW_OP_dup, DW_OP_plus_uconst(0x90), DW_OP_deref,
1026// // DW_OP_swap, DW_OP_plus_uconst(0), DW_OP_deref_size(4), DW_OP_dup, DW_OP_lit3,
1027// // DW_OP_ne, DW_OP_swap, DW_OP_lit4, DW_OP_ne, DW_OP_and, DW_OP_plus
1028// // This basically does a:
1029// // rip = ucontenxt.mcontext64->gpr.rip;
1030// // if (ucontenxt.mcontext64->exc.trapno != 3 && ucontenxt.mcontext64->exc.trapno != 4)
1031// // rip++;
1032// // The trap comparisons and increments are not needed as it hoses up the unwound PC which
1033// // is expected to point at least past the instruction that causes the fault/trap. So we
1034// // take it out by trimming the expression right at the first "DW_OP_swap" opcodes
1035// if (block_data != NULL && thread->GetPCRegNum(Thread::GCC) == reg_num)
1036// {
1037// if (thread->Is64Bit())
1038// {
1039// if (block_len > 9 && block_data[8] == DW_OP_swap && block_data[9] == DW_OP_plus_uconst)
1040// block_len = 8;
1041// }
1042// else
1043// {
1044// if (block_len > 8 && block_data[7] == DW_OP_swap && block_data[8] == DW_OP_plus_uconst)
1045// block_len = 7;
1046// }
1047// }
1048//#endif
1049 reg_location.SetIsDWARFExpression(block_data, block_len);
1050 row.SetRegisterInfo (reg_num, reg_location);
1051 }
1052 break;
1053
1054 case DW_CFA_val_offset : // 0x14
1055 case DW_CFA_val_offset_sf : // 0x15
1056 default:
1057 tmp_uval32 = extended_opcode;
1058 break;
1059 }
1060 }
1061 }
1062 fde->AppendRow(row);
1063}
1064
1065void
1066DWARFCallFrameInfo::ParseAll()
1067{
1068 Index();
1069 fde_map_t::iterator pos, end = m_fde_map.end();
1070 for (pos = m_fde_map.begin(); pos != end; ++ pos)
1071 {
1072 if (pos->second.fde_sp.get() == NULL)
1073 pos->second.fde_sp = ParseFDE(pos->second.fde_offset);
1074 }
1075}
1076
1077
1078//bool
1079//DWARFCallFrameInfo::UnwindRegisterAtIndex
1080//(
1081// const uint32_t reg_idx,
1082// const Thread* currState,
1083// const DWARFCallFrameInfo::Row* row,
1084// mapped_memory_t * memCache,
1085// Thread* unwindState
1086//)
1087//{
1088// bool get_reg_success = false;
1089//
1090// const RegLocation* regLocation = row->regs.GetRegisterInfo(reg_idx);
1091//
1092// // On some systems, we may not get unwind info for the program counter,
1093// // but the return address register can be used to get that information.
1094// if (reg_idx == currState->GetPCRegNum(Thread::Index))
1095// {
1096// const RegLocation* returnAddrRegLocation = row->regs.GetRegisterInfo(currState->GetRARegNum(Thread::Index));
1097// if (regLocation == NULL)
1098// {
1099// // We have nothing to the program counter, so lets see if this
1100// // thread state has a return address (link register) that can
1101// // help us track down the previous PC
1102// regLocation = returnAddrRegLocation;
1103// }
1104// else if (regLocation->type == RegLocation::unspecified)
1105// {
1106// // We did have a location that didn't specify a value for unwinding
1107// // the PC, so if there is a info for the return return address
1108// // register (link register) lets use that
1109// if (returnAddrRegLocation)
1110// regLocation = returnAddrRegLocation;
1111// }
1112// }
1113//
1114// if (regLocation)
1115// {
1116// mach_vm_address_t unwoundRegValue = INVALID_VMADDR;
1117// switch (regLocation->type)
1118// {
1119// case RegLocation::undefined:
1120// // Register is not available, mark it as invalid
1121// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1122// return true;
1123//
1124// case RegLocation::unspecified:
1125// // Nothing to do if it is the same
1126// return true;
1127//
1128// case RegLocation::same:
1129// // Nothing to do if it is the same
1130// return true;
1131//
1132// case RegLocation::atFPPlusOffset:
1133// case RegLocation::isFPPlusOffset:
1134// {
1135// uint64_t unwindAddress = currState->GetRegisterValue(row->cfa_register, Thread::GCC, INVALID_VMADDR, &get_reg_success);
1136//
1137// if (get_reg_success)
1138// {
1139// unwindAddress += row->cfa_offset + regLocation->location.offset;
1140//
1141// if (regLocation->type == RegLocation::isFPPlusOffset)
1142// {
1143// unwindState->SetRegisterValue(reg_idx, Thread::Index, unwindAddress);
1144// return true;
1145// }
1146// else
1147// {
1148// kern_return_t err = mapped_memory_read_pointer(memCache, unwindAddress, &unwoundRegValue);
1149// if (err != KERN_SUCCESS)
1150// {
1151// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1152// return false;
1153// }
1154// unwindState->SetRegisterValue(reg_idx, Thread::Index, unwoundRegValue);
1155// return true;
1156// }
1157// }
1158// else
1159// {
1160// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1161// }
1162// return false;
1163// }
1164// break;
1165//
1166// case RegLocation::atDWARFExpression:
1167// case RegLocation::isDWARFExpression:
1168// {
1169// bool swap = false;
1170// DWARFExpressionBaton baton = { currState, memCache, swap };
1171// uint64_t expr_result = 0;
1172// CSBinaryDataRef opcodes(regLocation->location.expr.opcodes, regLocation->location.expr.length, swap);
1173// opcodes.SetPointerSize(currState->Is64Bit() ? 8 : 4);
1174// const char * expr_err = CSDWARFExpression::Evaluate(DWARFExpressionReadMemoryDCScriptInterpreter::Type,
1175// DWARFExpressionReadRegisterDCScriptInterpreter::Type,
1176// &baton,
1177// opcodes,
1178// 0,
1179// regLocation->location.expr.length,
1180// NULL,
1181// expr_result);
1182// if (expr_err == NULL)
1183// {
1184// // SUCCESS!
1185// if (regLocation->type == RegLocation::isDWARFExpression)
1186// {
1187// unwindState->SetRegisterValue(reg_idx, Thread::Index, expr_result);
1188// return true;
1189// }
1190// else
1191// {
1192// kern_return_t err = mapped_memory_read_pointer(memCache, expr_result, &unwoundRegValue);
1193// if (err != KERN_SUCCESS)
1194// {
1195// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1196// return false;
1197// }
1198// unwindState->SetRegisterValue(reg_idx, Thread::Index, unwoundRegValue);
1199// return true;
1200// }
1201// }
1202// else
1203// {
1204// // FAIL
1205// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1206// }
1207// return false;
1208// }
1209// break;
1210//
1211//
1212// case RegLocation::inRegister:
1213// // The value is in another register.
1214// unwoundRegValue = currState->GetRegisterValue(regLocation->location.reg, Thread::GCC, 0, &get_reg_success);
1215// if (get_reg_success)
1216// {
1217// unwindState->SetRegisterValue(reg_idx, Thread::Index, unwoundRegValue);
1218// return true;
1219// }
1220// return false;
1221//
1222// default:
1223// break;
1224// }
1225// }
1226//
1227// if (reg_idx == currState->GetSPRegNum(Thread::Index))
1228// {
1229// uint64_t cfa = currState->GetRegisterValue(row->cfa_register, Thread::GCC, 0, &get_reg_success);
1230// if (get_reg_success)
1231// {
1232// return unwindState->SetSP(cfa + row->cfa_offset);
1233// }
1234// else
1235// {
1236// unwindState->SetRegisterIsValid(reg_idx, Thread::Index, false);
1237// return false;
1238// }
1239// }
1240//
1241// return false;
1242//}
1243
1244void
1245DWARFCallFrameInfo::Dump(Stream *s, Thread *thread) const
1246{
1247 s->Indent();
1248 s->Printf("DWARFCallFrameInfo for ");
1249 *s << m_objfile->GetFileSpec();
1250 if (m_flags.IsSet(eFlagParsedIndex))
1251 {
1252 s->Printf(" (CIE[%zu], FDE[%zu])\n", m_cie_map.size(), m_fde_map.size());
1253 s->IndentMore();
1254 cie_map_t::const_iterator cie_pos, cie_end = m_cie_map.end();
1255 const ArchSpec *arch = &m_objfile->GetModule()->GetArchitecture();
1256
1257 for (cie_pos = m_cie_map.begin(); cie_pos != cie_end; ++ cie_pos)
1258 {
1259 if (cie_pos->second.get() == NULL)
1260 {
1261 s->Indent();
1262 s->Printf("CIE{0x%8.8x} - unparsed\n", cie_pos->first);
1263 }
1264 else
1265 {
1266 cie_pos->second->Dump(s, thread, arch, m_reg_kind);
1267 }
1268 }
1269
1270 fde_map_t::const_iterator fde_pos, fde_end = m_fde_map.end();
1271 for (fde_pos = m_fde_map.begin(); fde_pos != fde_end; ++ fde_pos)
1272 {
1273 if (fde_pos->second.fde_sp.get() == NULL)
1274 {
1275 s->Indent();
1276 s->Printf("FDE{0x%8.8x} - unparsed\n", fde_pos->second.fde_offset);
1277 }
1278 else
1279 {
1280 fde_pos->second.fde_sp->Dump(s, *this, thread);
1281 }
1282 }
1283 s->IndentLess();
1284 }
1285 else
1286 {
1287 s->PutCString(" (not indexed yet)\n");
1288 }
1289}
1290
1291
1292//uint32_t
1293//DWARFCallFrameInfo::UnwindThreadState(const Thread* currState, mapped_memory_t *memCache, bool is_first_frame, Thread* unwindState)
1294//{
1295// if (currState == NULL || unwindState == NULL)
1296// return 0;
1297//
1298// *unwindState = *currState;
1299// uint32_t numRegisterUnwound = 0;
1300// uint64_t currPC = currState->GetPC(INVALID_VMADDR);
1301//
1302// if (currPC != INVALID_VMADDR)
1303// {
1304// // If this is not the first frame, we care about the previous instruction
1305// // since it will be at the instruction following the instruction that
1306// // made the function call.
1307// uint64_t unwindPC = currPC;
1308// if (unwindPC > 0 && !is_first_frame)
1309// --unwindPC;
1310//
1311//#if defined(__i386__) || defined(__x86_64__)
1312// // Only on i386 do we have __IMPORT segments that contain trampolines
1313// if (!currState->Is64Bit() && ImportRangesContainsAddress(unwindPC))
1314// {
1315// uint64_t curr_sp = currState->GetSP(INVALID_VMADDR);
1316// mach_vm_address_t pc = INVALID_VMADDR;
1317// unwindState->SetSP(curr_sp + 4);
1318// kern_return_t err = mapped_memory_read_pointer(memCache, curr_sp, &pc);
1319// if (err == KERN_SUCCESS)
1320// {
1321// unwindState->SetPC(pc);
1322// return 2;
1323// }
1324// }
1325//#endif
1326// FDE *fde = FindFDE(unwindPC);
1327// if (fde)
1328// {
1329// FindRowUserData rowUserData (currState, unwindPC);
1330// ParseInstructions (currState, fde, FindRowForAddress, &rowUserData);
1331//
1332// const uint32_t numRegs = currState->NumRegisters();
1333// for (uint32_t regNum = 0; regNum < numRegs; regNum++)
1334// {
1335// if (UnwindRegisterAtIndex(regNum, currState, &rowUserData.state, memCache, unwindState))
1336// numRegisterUnwound++;
1337// }
1338// }
1339// }
1340// return numRegisterUnwound;
1341//}
1342
1343