When allocating space on stack for writing a register,
use the size of the register, not the size of the Value type,
to get the right alignment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1284 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index bc82565..9133da5 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -528,8 +528,10 @@
   int SpillOff = LR->getSpillOffFromFP();
   RegClass *RC = LR->getRegClass();
   const LiveVarSet *LVSetBef =  LVI->getLiveVarSetBeforeMInst(MInst, BB);
+
+  /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
   int TmpOff = 
-    mcInfo.pushTempValue(TM, TM.findOptimalStorageSize(LR->getType()));
+    mcInfo.pushTempValue(TM, 8 /* TM.findOptimalStorageSize(LR->getType()) */);
   
   MachineInstr *MIBef=NULL,  *AdIMid=NULL, *MIAft=NULL;
   int TmpReg;
diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index bc82565..9133da5 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -528,8 +528,10 @@
   int SpillOff = LR->getSpillOffFromFP();
   RegClass *RC = LR->getRegClass();
   const LiveVarSet *LVSetBef =  LVI->getLiveVarSetBeforeMInst(MInst, BB);
+
+  /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
   int TmpOff = 
-    mcInfo.pushTempValue(TM, TM.findOptimalStorageSize(LR->getType()));
+    mcInfo.pushTempValue(TM, 8 /* TM.findOptimalStorageSize(LR->getType()) */);
   
   MachineInstr *MIBef=NULL,  *AdIMid=NULL, *MIAft=NULL;
   int TmpReg;
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 9b8fe17..53a4beb 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -1211,6 +1211,8 @@
 // 
 // Purpose:
 //   Interface to stack frame layout info for the UltraSPARC.
+//   Starting offsets for each area of the stack frame are aligned at
+//   a multiple of getStackFrameSizeAlignment().
 //---------------------------------------------------------------------------
 
 class UltraSparcFrameInfo: public MachineFrameInfo {
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index 16e3b9f..e59a3ab 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -709,9 +709,9 @@
 	
 	int TReg = PRA.getRegNotUsedByThisInst( LR->getRegClass(), CallMI );
 
-	int TmpOff = PRA.mcInfo.pushTempValue(target,
-                              target.findOptimalStorageSize(LR->getType()));
-                  // getStackOffsets().getNewTmpPosOffFromFP();
+    /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
+	int TmpOff = PRA.mcInfo.pushTempValue(target, 8);
+                          // target.findOptimalStorageSize(LR->getType()));
         
 	int argOffset = PRA.mcInfo.allocateOptionalArg(target, LR->getType()); 
         
@@ -1174,8 +1174,9 @@
 	    // and add them to InstrnsBefore and InstrnsAfter of the
 	    // call instruction
 
-	    int StackOff =  PRA.mcInfo.pushTempValue(target,
-                              target.findOptimalStorageSize(LR->getType()));
+    /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
+	    int StackOff =  PRA.mcInfo.pushTempValue(target, 8);
+                // target.findOptimalStorageSize(LR->getType()));
             
 	    MachineInstr *AdIBefCC, *AdIAftCC, *AdICpCC;
 	    MachineInstr *AdIBef, *AdIAft;
@@ -1548,6 +1549,7 @@
 	  MachineInstr *AdIBef, *AdIAft;
 	      
 	  // TODO: Change 8 below
+    /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
 	  const int StackOff =  PRA.mcInfo.pushTempValue(target, 8);
 	  
 	  // Save the UReg (%ox) on stack before it's destroyed
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index b6bf94f..20bad83 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -193,7 +193,8 @@
 // 
 // Purpose:
 //   Interface to stack frame layout info for the UltraSPARC.
-//   Note that there is no machine-independent interface to this information
+//   Starting offsets for each area of the stack frame are aligned at
+//   a multiple of getStackFrameSizeAlignment().
 //---------------------------------------------------------------------------
 
 int
@@ -210,7 +211,9 @@
 {
   pos = false;                          // static stack area grows downwards
   unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
-  return  StaticAreaOffsetFromFP - autoVarsSize;
+  if (int mod = autoVarsSize % getStackFrameSizeAlignment())  
+    autoVarsSize += (getStackFrameSizeAlignment() - mod);
+  return StaticAreaOffsetFromFP - autoVarsSize; 
 }
 
 int
@@ -220,7 +223,10 @@
   pos = false;                          // static stack area grows downwards
   unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
   unsigned int spillAreaSize = mcInfo.getRegSpillsSize();
-  return StaticAreaOffsetFromFP - (autoVarsSize + spillAreaSize);
+  int offset = autoVarsSize + spillAreaSize;
+  if (int mod = offset % getStackFrameSizeAlignment())  
+    offset += (getStackFrameSizeAlignment() - mod);
+  return StaticAreaOffsetFromFP - offset;
 }
 
 int
@@ -229,7 +235,9 @@
 {
   // dynamic stack area grows downwards starting at top of opt-args area
   unsigned int optArgsSize = mcInfo.getMaxOptionalArgsSize();
-  return optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
+  int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
+  assert(offset % getStackFrameSizeAlignment() == 0);
+  return offset;
 }