diff --git a/lib/Target/Mips/CMakeLists.txt b/lib/Target/Mips/CMakeLists.txt
index fb2e926..1b4329b 100644
--- a/lib/Target/Mips/CMakeLists.txt
+++ b/lib/Target/Mips/CMakeLists.txt
@@ -12,7 +12,6 @@
   MipsAsmPrinter.cpp
   MipsCodeEmitter.cpp
   MipsDelaySlotFiller.cpp
-  MipsELFWriterInfo.cpp
   MipsEmitGPRestore.cpp
   MipsExpandPseudo.cpp
   MipsJITInfo.cpp
diff --git a/lib/Target/Mips/MipsELFWriterInfo.cpp b/lib/Target/Mips/MipsELFWriterInfo.cpp
deleted file mode 100644
index 3f3414f..0000000
--- a/lib/Target/Mips/MipsELFWriterInfo.cpp
+++ /dev/null
@@ -1,215 +0,0 @@
-//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend ------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements ELF writer information for the Mips backend.
-//
-//===----------------------------------------------------------------------===//
-#include "MipsELFWriterInfo.h"
-#include "MipsRelocations.h"
-#include "llvm/Function.h"
-#include "llvm/Support/ELF.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetMachine.h"
-
-using namespace llvm;
-
-//===----------------------------------------------------------------------===//
-//  Implementation of the MipsELFWriterInfo class
-//===----------------------------------------------------------------------===//
-
-MipsELFWriterInfo::MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
-  : TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
-  EMachine = EM_MIPS;
-}
-
-MipsELFWriterInfo::~MipsELFWriterInfo() {}
-
-unsigned MipsELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
-  if (is64Bit) {
-    switch(MachineRelTy) {
-    default:
-      llvm_unreachable("unknown Mips_64 machine relocation type");
-    }
-  } else {
-    switch(MachineRelTy) {
-    case Mips::reloc_mips_pcrel:
-      return ELF::R_MIPS_PC16;
-    case Mips::reloc_mips_hi:
-      return ELF::R_MIPS_HI16;
-    case Mips::reloc_mips_lo:
-      return ELF::R_MIPS_LO16;
-    case Mips::reloc_mips_j_jal:
-      return ELF::R_MIPS_26;
-    case Mips::reloc_mips_16:
-      return ELF::R_MIPS_16;
-    case Mips::reloc_mips_32:
-      return ELF::R_MIPS_32;
-    case Mips::reloc_mips_rel32:
-      return ELF::R_MIPS_REL32;
-    case Mips::reloc_mips_gprel16:
-      return ELF::R_MIPS_GPREL16;
-    case Mips::reloc_mips_literal:
-      return ELF::R_MIPS_LITERAL;
-    case Mips::reloc_mips_got16:
-      return ELF::R_MIPS_GOT16;
-    case Mips::reloc_mips_call16:
-      return ELF::R_MIPS_CALL16;
-    case Mips::reloc_mips_gprel32:
-      return ELF::R_MIPS_GPREL32;
-    case Mips::reloc_mips_shift5:
-      return ELF::R_MIPS_SHIFT5;
-    case Mips::reloc_mips_shift6:
-      return ELF::R_MIPS_SHIFT6;
-    case Mips::reloc_mips_64:
-      return ELF::R_MIPS_64;
-    case Mips::reloc_mips_tlsgd:
-      return ELF::R_MIPS_TLS_GD;
-    case Mips::reloc_mips_gottprel:
-      return ELF::R_MIPS_TLS_GOTTPREL;
-    case Mips::reloc_mips_tprel_hi:
-      return ELF::R_MIPS_TLS_TPREL_HI16;
-    case Mips::reloc_mips_tprel_lo:
-      return ELF::R_MIPS_TLS_TPREL_LO16;
-    case Mips::reloc_mips_branch_pcrel:
-      return ELF::R_MIPS_PC16;
-    default:
-      llvm_unreachable("unknown Mips machine relocation type");
-    }
-  }
-  return 0;
-}
-
-long int MipsELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
-                                                     long int Modifier) const {
-  if (is64Bit) {
-    switch(RelTy) {
-    default:
-      llvm_unreachable("unknown Mips_64 relocation type");
-    }
-  } else {
-    switch(RelTy) {
-    case ELF::R_MIPS_PC16: return Modifier - 4;
-    default:
-      llvm_unreachable("unknown Mips relocation type");
-    }
-  }
-  return 0;
-}
-
-unsigned MipsELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
-  if (is64Bit) {
-    switch(RelTy) {
-    case ELF::R_MIPS_PC16:
-    case ELF::R_MIPS_HI16:
-    case ELF::R_MIPS_LO16:
-    case ELF::R_MIPS_26:
-    case ELF::R_MIPS_16:
-    case ELF::R_MIPS_32:
-    case ELF::R_MIPS_REL32:
-    case ELF::R_MIPS_GPREL16:
-    case ELF::R_MIPS_LITERAL:
-    case ELF::R_MIPS_GOT16:
-    case ELF::R_MIPS_CALL16:
-    case ELF::R_MIPS_GPREL32:
-    case ELF::R_MIPS_SHIFT5:
-    case ELF::R_MIPS_SHIFT6:
-      return 32;
-    case ELF::R_MIPS_64:
-      return 64;
-    default:
-      llvm_unreachable("unknown Mips_64 relocation type");
-    }
-  } else {
-    switch(RelTy) {
-    case ELF::R_MIPS_PC16:
-    case ELF::R_MIPS_HI16:
-    case ELF::R_MIPS_LO16:
-    case ELF::R_MIPS_26:
-    case ELF::R_MIPS_16:
-    case ELF::R_MIPS_32:
-    case ELF::R_MIPS_REL32:
-    case ELF::R_MIPS_GPREL16:
-    case ELF::R_MIPS_LITERAL:
-    case ELF::R_MIPS_GOT16:
-    case ELF::R_MIPS_CALL16:
-    case ELF::R_MIPS_GPREL32:
-    case ELF::R_MIPS_SHIFT5:
-    case ELF::R_MIPS_SHIFT6:
-      return 32;
-    default:
-      llvm_unreachable("unknown Mips relocation type");
-    }
-  }
-  return 0;
-}
-
-bool MipsELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
-  if (is64Bit) {
-    switch(RelTy) {
-    case ELF::R_MIPS_PC16:
-      return true;
-    case ELF::R_MIPS_HI16:
-    case ELF::R_MIPS_LO16:
-    case ELF::R_MIPS_26:
-    case ELF::R_MIPS_16:
-    case ELF::R_MIPS_32:
-    case ELF::R_MIPS_REL32:
-    case ELF::R_MIPS_GPREL16:
-    case ELF::R_MIPS_LITERAL:
-    case ELF::R_MIPS_GOT16:
-    case ELF::R_MIPS_CALL16:
-    case ELF::R_MIPS_GPREL32:
-    case ELF::R_MIPS_SHIFT5:
-    case ELF::R_MIPS_SHIFT6:
-    case ELF::R_MIPS_64:
-      return false;
-    default:
-      llvm_unreachable("unknown Mips_64 relocation type");
-    }
-  } else {
-    switch(RelTy) {
-    case ELF::R_MIPS_PC16:
-      return true;
-    case ELF::R_MIPS_HI16:
-    case ELF::R_MIPS_LO16:
-    case ELF::R_MIPS_26:
-    case ELF::R_MIPS_16:
-    case ELF::R_MIPS_32:
-    case ELF::R_MIPS_REL32:
-    case ELF::R_MIPS_GPREL16:
-    case ELF::R_MIPS_LITERAL:
-    case ELF::R_MIPS_GOT16:
-    case ELF::R_MIPS_CALL16:
-    case ELF::R_MIPS_GPREL32:
-    case ELF::R_MIPS_SHIFT5:
-    case ELF::R_MIPS_SHIFT6:
-      return false;
-    default:
-      llvm_unreachable("unknown Mips relocation type");
-    }
-  }
-  return 0;
-}
-
-unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
-  assert("getAbsoluteLabelMachineRelTy unknown for this relocation type");
-  return 0;
-}
-
-long int MipsELFWriterInfo::computeRelocation(unsigned SymOffset,
-                                              unsigned RelOffset,
-                                              unsigned RelTy) const {
-  if (RelTy == ELF::R_MIPS_PC16)
-    return SymOffset - (RelOffset + 4);
-  else
-    assert("computeRelocation unknown for this relocation type");
-
-  return 0;
-}
diff --git a/lib/Target/Mips/MipsELFWriterInfo.h b/lib/Target/Mips/MipsELFWriterInfo.h
deleted file mode 100644
index 8d7d02b..0000000
--- a/lib/Target/Mips/MipsELFWriterInfo.h
+++ /dev/null
@@ -1,60 +0,0 @@
-//===-- MipsELFWriterInfo.h - ELF Writer Info for Mips ----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements ELF writer information for the Mips backend.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef Mips_ELF_WRITER_INFO_H
-#define Mips_ELF_WRITER_INFO_H
-
-#include "llvm/Target/TargetELFWriterInfo.h"
-
-namespace llvm {
-
-  class MipsELFWriterInfo : public TargetELFWriterInfo {
-
-  public:
-    MipsELFWriterInfo(bool, bool);
-    virtual ~MipsELFWriterInfo();
-
-    /// getRelocationType - Returns the target specific ELF Relocation type.
-    /// 'MachineRelTy' contains the object code independent relocation type
-    virtual unsigned getRelocationType(unsigned MachineRelTy) const;
-
-    /// hasRelocationAddend - True if the target uses an addend in the
-    /// ELF relocation entry.
-    virtual bool hasRelocationAddend() const { return true; } 
-    // FIXME Should be case by case
-
-    /// getDefaultAddendForRelTy - Gets the default addend value for a
-    /// relocation entry based on the target ELF relocation type.
-    virtual long int getDefaultAddendForRelTy(unsigned RelTy,
-                                              long int Modifier = 0) const;
-
-    /// getRelTySize - Returns the size of relocatable field in bits
-    virtual unsigned getRelocationTySize(unsigned RelTy) const;
-
-    /// isPCRelativeRel - True if the relocation type is pc relative
-    virtual bool isPCRelativeRel(unsigned RelTy) const;
-
-    /// getJumpTableRelocationTy - Returns the machine relocation type used
-    /// to reference a jumptable.
-    virtual unsigned getAbsoluteLabelMachineRelTy() const;
-
-    /// computeRelocation - Some relocatable fields could be relocated
-    /// directly, avoiding the relocation symbol emission, compute the
-    /// final relocation value for this symbol.
-    virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
-                                       unsigned RelTy) const;
-  };
-
-} // end llvm namespace
-
-#endif // Mips_ELF_WRITER_INFO_H
diff --git a/lib/Target/Mips/MipsRelocations.h b/lib/Target/Mips/MipsRelocations.h
index 18f1b2b..66d1bfd 100644
--- a/lib/Target/Mips/MipsRelocations.h
+++ b/lib/Target/Mips/MipsRelocations.h
@@ -33,29 +33,7 @@
       reloc_mips_lo = 3,
 
       // reloc_mips_26 - lower 28 bits of the address, shifted right by 2.
-      reloc_mips_26 = 4,
-
-      // I am starting here with the rest of the relocations because
-      // I have no idea if the above enumerations are assumed somewhere
-      // else
-      reloc_mips_16         =  6, // R_MIPS_16
-      reloc_mips_32         =  7, // R_MIPS_32
-      reloc_mips_rel32      =  8, // R_MIPS_REL32
-      reloc_mips_gprel16    = 10, // R_MIPS_GPREL16
-      reloc_mips_literal    = 12, // R_MIPS_LITERAL
-      reloc_mips_got16      = 13, // R_MIPS_GOT16
-      reloc_mips_call16     = 15, // R_MIPS_CALL16
-      reloc_mips_gprel32    = 17, // R_MIPS_GPREL32
-      reloc_mips_shift5     = 18, // R_MIPS_SHIFT5
-      reloc_mips_shift6     = 19, // R_MIPS_SHIFT6
-      reloc_mips_64         = 20, // R_MIPS_64
-      reloc_mips_tlsgd      = 21, // R_MIPS_TLS_GD
-      reloc_mips_gottprel   = 22, // R_MIPS_TLS_GOTTPREL
-      reloc_mips_tprel_hi   = 23, // R_MIPS_TLS_TPREL_HI16
-      reloc_mips_tprel_lo   = 24, // R_MIPS_TLS_TPREL_LO16
-      reloc_mips_branch_pcrel = 25, // This should become R_MIPS_PC16
-      reloc_mips_pcrel      =  26, // R_MIPS_PC16
-      reloc_mips_j_jal      =  27 // R_MIPS_26
+      reloc_mips_26 = 4
     };
   }
 }