commit 01269524ce08523a06f736e16df84bf536cfe901
author Andrew Lenharth <andrewl@lenharth.org> Mon Jan 24 18:37:48 2005 +0000
committer Andrew Lenharth <andrewl@lenharth.org> Mon Jan 24 18:37:48 2005 +0000
tree 2ed4b115cad1bf1fd98c7692c1df490bd3fcaf2d
parent dd106c2f8b3385344c8f09a4ca30702dad02f715

Pruned includes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19813 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Alpha/AlphaAsmPrinter.cpp

diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 85feb9d..922a465 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -1,4 +1,4 @@
-//===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer --------------===//
+//===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer ------------------===//
 // 
 //                     The LLVM Compiler Infrastructure
 //
@@ -14,25 +14,17 @@
 
 #include "Alpha.h"
 #include "AlphaInstrInfo.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"
 #include "llvm/Assembly/Writer.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MRegisterInfo.h"
-#include "llvm/Target/TargetInstrInfo.h"
 
 #include "llvm/Support/Mangler.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/Support/CommandLine.h"
-#include <cctype>
+
 using namespace llvm;
 
 namespace {
@@ -87,7 +79,7 @@
   const MachineOperand &MO = MI->getOperand(opNum);
   if (MO.getType() == MachineOperand::MO_MachineRegister) {
     assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
-    O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
+    O << TM.getRegisterInfo()->get(MO.getReg()).Name;
   } else if (MO.isImmediate()) {
     O << MO.getImmedValue();
   } else {
@@ -109,7 +101,7 @@
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
   case MachineOperand::MO_CCRegister:
-    O << LowercaseString(RI.get(MO.getReg()).Name);
+    O << RI.get(MO.getReg()).Name;
     return;
 
   case MachineOperand::MO_SignExtendedImmed:
@@ -119,7 +111,7 @@
     return;
 
   case MachineOperand::MO_PCRelativeDisp:
-    std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs";
+    std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs";
     abort();
     return;
     
@@ -140,8 +132,6 @@
     return;
 
   case MachineOperand::MO_GlobalAddress: 
-    //std::cerr << "Global Addresses?  Are you kidding?\n"
-    //abort();
     O << Mang->getValueName(MO.getGlobal());
     return;