generate address of constant pool entries
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22298 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index bdd7c5d..6d2cfc6 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1520,11 +1520,15 @@
BuildMI(BB, Alpha::BIS, 2, Result).addReg(Alpha::R30).addReg(Alpha::R30);
return Result;
-// case ISD::ConstantPool:
-// Tmp1 = cast<ConstantPoolSDNode>(N)->getIndex();
-// AlphaLowering.restoreGP(BB);
-// BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addConstantPoolIndex(Tmp1);
-// return Result;
+ case ISD::ConstantPool:
+ Tmp1 = cast<ConstantPoolSDNode>(N)->getIndex();
+ AlphaLowering.restoreGP(BB);
+ Tmp2 = MakeReg(MVT::i64);
+ BuildMI(BB, Alpha::LDAHr, 2, Tmp2).addConstantPoolIndex(Tmp1)
+ .addReg(Alpha::R29);
+ BuildMI(BB, Alpha::LDAr, 2, Result).addConstantPoolIndex(Tmp1)
+ .addReg(Tmp2);
+ return Result;
case ISD::FrameIndex:
BuildMI(BB, Alpha::LDA, 2, Result)
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td
index 1647499..d660bad 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/lib/Target/Alpha/AlphaInstrInfo.td
@@ -369,6 +369,7 @@
def LDTr : MForm<0x23, (ops FPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldt $RA,$DISP($RB) !gprellow">; //Load T_floating
//Load address, rellocated form
+def LDAr : MForm<0x08, (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "lda $RA,$DISP($RB) !gprellow">; //Load address
def LDAHr : MForm<0x08, (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldah $RA,$DISP($RB) !gprelhigh">; //Load address high