commit 02d2e612521954b5ff7c1ba6fd53e36bc51e1c48
author Michael Liao <michael.liao@intel.com> Thu Apr 11 04:52:28 2013 +0000
committer Michael Liao <michael.liao@intel.com> Thu Apr 11 04:52:28 2013 +0000
tree af6fc7afc6bc91ff6926a48e7819b9538dc1bf68
parent 959ddbb5e0e088f4d5c3f8c015de3caf0baa6e6c

Add CLAC/STAC instruction encoding/decoding support

As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86CodeEmitter.cpp

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 2518e02..8fea6ed 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -1451,6 +1451,14 @@
     MCE.emitByte(BaseOpcode);
     MCE.emitByte(0xC9);
     break;
+  case X86II::MRM_CA:
+    MCE.emitByte(BaseOpcode);
+    MCE.emitByte(0xCA);
+    break;
+  case X86II::MRM_CB:
+    MCE.emitByte(BaseOpcode);
+    MCE.emitByte(0xCB);
+    break;
   case X86II::MRM_E8:
     MCE.emitByte(BaseOpcode);
     MCE.emitByte(0xE8);