- Start moving target-dependent nodes that could be represented by an
instruction sequence and cannot ordinarily be simplified by DAGcombine
into the various target description files or SPUDAGToDAGISel.cpp.
This makes some 64-bit operations legal.
- Eliminate target-dependent ISD enums.
- Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61508 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/CellSPU/fdiv.ll b/test/CodeGen/CellSPU/fdiv.ll
index 826a2fa..d121c3f 100644
--- a/test/CodeGen/CellSPU/fdiv.ll
+++ b/test/CodeGen/CellSPU/fdiv.ll
@@ -1,9 +1,11 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
; RUN: grep frest %t1.s | count 2
; RUN: grep -w fi %t1.s | count 2
-; RUN: grep fm %t1.s | count 4
+; RUN: grep -w fm %t1.s | count 2
; RUN: grep fma %t1.s | count 2
-; RUN: grep fnms %t1.s | count 2
+; RUN: grep fnms %t1.s | count 4
+; RUN: grep cgti %t1.s | count 2
+; RUN: grep selb %t1.s | count 2
;
; This file includes standard floating point arithmetic instructions
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"