commit 0355862f712ce23ebb82e9e9378e92ef3b34027b
author Dan Gohman <gohman@apple.com> Fri Apr 10 15:59:38 2009 +0000
committer Dan Gohman <gohman@apple.com> Fri Apr 10 15:59:38 2009 +0000
tree 579eb67a488455bc316ec354992951ec9f9b7591
parent 5c5f5a2ec2dd49bd3049fa0a55aca4956fc56ff2

Now that register classes have names, include the name in debug output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
index 4ad36da..abeb7f4 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
@@ -268,9 +268,11 @@
         cerr << "Op->Val = "; Op.getNode()->dump(DAG); cerr << "\n";
         cerr << "MI = "; MI->print(cerr);
         cerr << "VReg = " << VReg << "\n";
-        cerr << "VReg RegClass     size = " << VRC->getSize()
+        cerr << "VReg RegClass " << VRC->getName()
+             << "     size = " << VRC->getSize()
              << ", align = " << VRC->getAlignment() << "\n";
-        cerr << "Expected RegClass size = " << RC->getSize()
+        cerr << "Expected RegClass " << RC->getName()
+             << " size = " << RC->getSize()
              << ", align = " << RC->getAlignment() << "\n";
         cerr << "Fatal error, aborting.\n";
         abort();