* Removed extraneous #includes
* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3278 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InstrSelection/InstrForest.cpp b/lib/CodeGen/InstrSelection/InstrForest.cpp
index cf355a5..d7edf15 100644
--- a/lib/CodeGen/InstrSelection/InstrForest.cpp
+++ b/lib/CodeGen/InstrSelection/InstrForest.cpp
@@ -1,12 +1,5 @@
-// $Id$
-//---------------------------------------------------------------------------
-// File:
-//	InstrForest.cpp
-// 
-// Purpose:
-//	Convert SSA graph to instruction trees for instruction selection.
-// 
-// Strategy:
+//===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
+//
 //  The key goal is to group instructions into a single
 //  tree if one or more of them might be potentially combined into a single
 //  complex instruction in the target machine.
@@ -17,7 +10,7 @@
 //  and (2) O and I are part of the same basic block,
 //  and (3) O has only a single use, viz., I.
 // 
-//---------------------------------------------------------------------------
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
@@ -28,8 +21,6 @@
 #include "llvm/Type.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "Support/STLExtras.h"
-#include <alloca.h>
-#include <iostream>
 using std::cerr;
 using std::vector;
 
@@ -127,10 +118,10 @@
   const MachineCodeForInstruction &mvec =
     MachineCodeForInstruction::get(getInstruction());
 
-  if (mvec.size() > 0)
+  if (!mvec.empty())
     cerr << "\tMachine Instructions:  ";
 
-  for (unsigned int i=0; i < mvec.size(); ++i) {
+  for (unsigned i = 0; i < mvec.size(); ++i) {
     mvec[i]->dump();
     if (i < mvec.size() - 1)
       cerr << ";  ";
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
index e4a188e..914fec3 100644
--- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
@@ -1,14 +1,9 @@
-//***************************************************************************
-// File:
-//	InstrSelectionSupport.h
+//===-- InstrSelectionSupport.cpp -----------------------------------------===//
+//
+// Target-independent instruction selection code.  See SparcInstrSelection.cpp
+// for usage.
 // 
-// Purpose:
-//	Target-independent instruction selection code.
-//      See SparcInstrSelection.cpp for usage.
-//      
-// History:
-//	10/10/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/InstrSelection.h"
@@ -21,7 +16,6 @@
 #include "llvm/Target/MachineRegInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/Function.h"
-#include "llvm/BasicBlock.h"
 #include "llvm/Type.h"
 #include "llvm/iMemory.h"
 using std::vector;
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 124c28a..7903411 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -1,25 +1,12 @@
-// $Id$
-//***************************************************************************
-// File:
-//	MachineInstr.cpp
+//===-- MachineInstr.cpp --------------------------------------------------===//
 // 
-// Purpose:
-//	
-// 
-// Strategy:
-// 
-// History:
-//	7/2/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Value.h"
-#include <iostream>
 using std::cerr;
 
 
-//************************ Class Implementations **************************/
-
 // Constructor for instructions with fixed #operands (nearly all)
 MachineInstr::MachineInstr(MachineOpCode _opCode,
 			   OpCodeMask    _opCodeMask)
diff --git a/lib/CodeGen/MachineInstrAnnot.cpp b/lib/CodeGen/MachineInstrAnnot.cpp
index c5c0c3f..960c492 100644
--- a/lib/CodeGen/MachineInstrAnnot.cpp
+++ b/lib/CodeGen/MachineInstrAnnot.cpp
@@ -1,20 +1,13 @@
-// $Id$ -*-c++-*-
-//***************************************************************************
-// File:
-//	MachineInstrAnnot.cpp
+//===-- MachineInstrAnnot.cpp ---------------------------------------------===//
 // 
-// Purpose:
-//      Annotations used to pass information between code generation phases.
+//  This file defines Annotations used to pass information between code
+//  generation phases.
 // 
-// History:
-//	5/10/02	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/Annotation.h"
 #include "llvm/iOther.h"
-#include <vector>
-
 
 AnnotationID CallArgsDescriptor::AID(AnnotationManager::
                                      getID("CodeGen::CallArgsDescriptor"));
diff --git a/lib/Target/SparcV9/InstrSelection/InstrForest.cpp b/lib/Target/SparcV9/InstrSelection/InstrForest.cpp
index cf355a5..d7edf15 100644
--- a/lib/Target/SparcV9/InstrSelection/InstrForest.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrForest.cpp
@@ -1,12 +1,5 @@
-// $Id$
-//---------------------------------------------------------------------------
-// File:
-//	InstrForest.cpp
-// 
-// Purpose:
-//	Convert SSA graph to instruction trees for instruction selection.
-// 
-// Strategy:
+//===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
+//
 //  The key goal is to group instructions into a single
 //  tree if one or more of them might be potentially combined into a single
 //  complex instruction in the target machine.
@@ -17,7 +10,7 @@
 //  and (2) O and I are part of the same basic block,
 //  and (3) O has only a single use, viz., I.
 // 
-//---------------------------------------------------------------------------
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
@@ -28,8 +21,6 @@
 #include "llvm/Type.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "Support/STLExtras.h"
-#include <alloca.h>
-#include <iostream>
 using std::cerr;
 using std::vector;
 
@@ -127,10 +118,10 @@
   const MachineCodeForInstruction &mvec =
     MachineCodeForInstruction::get(getInstruction());
 
-  if (mvec.size() > 0)
+  if (!mvec.empty())
     cerr << "\tMachine Instructions:  ";
 
-  for (unsigned int i=0; i < mvec.size(); ++i) {
+  for (unsigned i = 0; i < mvec.size(); ++i) {
     mvec[i]->dump();
     if (i < mvec.size() - 1)
       cerr << ";  ";
diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
index e4a188e..914fec3 100644
--- a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
@@ -1,14 +1,9 @@
-//***************************************************************************
-// File:
-//	InstrSelectionSupport.h
+//===-- InstrSelectionSupport.cpp -----------------------------------------===//
+//
+// Target-independent instruction selection code.  See SparcInstrSelection.cpp
+// for usage.
 // 
-// Purpose:
-//	Target-independent instruction selection code.
-//      See SparcInstrSelection.cpp for usage.
-//      
-// History:
-//	10/10/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/InstrSelection.h"
@@ -21,7 +16,6 @@
 #include "llvm/Target/MachineRegInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/Function.h"
-#include "llvm/BasicBlock.h"
 #include "llvm/Type.h"
 #include "llvm/iMemory.h"
 using std::vector;
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.cpp b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
index b4460f0..bf522d9 100644
--- a/lib/Target/SparcV9/SparcV9InstrInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
@@ -1,30 +1,18 @@
-//***************************************************************************
-// File:
-//	SparcInstrInfo.cpp
-// 
-// Purpose:
-//	
-// History:
-//	10/15/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
-
+//===-- SparcInstrInfo.cpp ------------------------------------------------===//
+//
+//===----------------------------------------------------------------------===//
 
 #include "SparcInternals.h"
 #include "SparcInstrSelectionSupport.h"
-#include "llvm/Target/Sparc.h"
 #include "llvm/CodeGen/InstrSelection.h"
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/MachineCodeForMethod.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/Function.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Instruction.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 using std::vector;
 
-//************************ Internal Functions ******************************/
-
 static const uint32_t MAXLO   = (1 << 10) - 1; // set bits set by %lo(*)
 static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
 
@@ -33,7 +21,7 @@
 // 
 static inline void
 CreateSETUWConst(const TargetMachine& target, uint32_t C,
-                 Instruction* dest, std::vector<MachineInstr*>& mvec)
+                 Instruction* dest, vector<MachineInstr*>& mvec)
 {
   MachineInstr *miSETHI = NULL, *miOR = NULL;
   
@@ -81,7 +69,7 @@
 // Not needed for SPARC v9 but useful to make the two SETX functions similar
 static inline void
 CreateSETUWLabel(const TargetMachine& target, Value* val,
-                 Instruction* dest, std::vector<MachineInstr*>& mvec)
+                 Instruction* dest, vector<MachineInstr*>& mvec)
 {
   MachineInstr* MI;
   
@@ -101,7 +89,7 @@
 // with sign-extension to 64 bits.
 static inline void
 CreateSETSWConst(const TargetMachine& target, int32_t C,
-                 Instruction* dest, std::vector<MachineInstr*>& mvec)
+                 Instruction* dest, vector<MachineInstr*>& mvec)
 {
   MachineInstr* MI;
   
@@ -121,7 +109,7 @@
 static inline void
 CreateSETXConst(const TargetMachine& target, uint64_t C,
                 Instruction* tmpReg, Instruction* dest,
-                std::vector<MachineInstr*>& mvec)
+                vector<MachineInstr*>& mvec)
 {
   assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!");
   
@@ -147,7 +135,7 @@
 static inline void
 CreateSETXLabel(const TargetMachine& target,
                 Value* val, Instruction* tmpReg, Instruction* dest,
-                std::vector<MachineInstr*>& mvec)
+                vector<MachineInstr*>& mvec)
 {
   assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
          "I only know about constant values and global addresses");
@@ -181,7 +169,7 @@
 static inline void
 CreateIntSetInstruction(const TargetMachine& target,
                         int64_t C, Instruction* dest,
-                        std::vector<MachineInstr*>& mvec,
+                        vector<MachineInstr*>& mvec,
                         MachineCodeForInstruction& mcfi)
 {
   assert(dest->getType()->isSigned() && "Use CreateUIntSetInstruction()");
@@ -201,7 +189,7 @@
 static inline void
 CreateUIntSetInstruction(const TargetMachine& target,
                          uint64_t C, Instruction* dest,
-                         std::vector<MachineInstr*>& mvec,
+                         vector<MachineInstr*>& mvec,
                          MachineCodeForInstruction& mcfi)
 {
   assert(! dest->getType()->isSigned() && "Use CreateIntSetInstruction()");
@@ -219,7 +207,7 @@
 }
 
 
-//************************* External Classes *******************************/
+
 
 //---------------------------------------------------------------------------
 // class UltraSparcInstrInfo 
@@ -252,7 +240,7 @@
                                            Function* F,
                                            Value* val,
                                            Instruction* dest,
-                                           std::vector<MachineInstr*>& mvec,
+                                           vector<MachineInstr*>& mvec,
                                        MachineCodeForInstruction& mcfi) const
 {
   assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
@@ -333,7 +321,7 @@
                                         Function* F,
                                         Value* val,
                                         Instruction* dest,
-                                        std::vector<MachineInstr*>& mvec,
+                                        vector<MachineInstr*>& mvec,
                                         MachineCodeForInstruction& mcfi) const
 {
   assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
@@ -378,7 +366,7 @@
                                         Function* F,
                                         Value* val,
                                         Instruction* dest,
-                                        std::vector<MachineInstr*>& mvec,
+                                        vector<MachineInstr*>& mvec,
                                         MachineCodeForInstruction& mcfi) const
 {
   const Type* opTy   = val->getType();
diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 1b27d32..9b726a5 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -1,14 +1,8 @@
-// $Id$
-//***************************************************************************
-// File:
-//	SparcInstrSelection.cpp
-// 
-// Purpose:
-//      BURS instruction selection for SPARC V9 architecture.      
-//	
-// History:
-//	7/02/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===-- SparcInstrSelection.cpp -------------------------------------------===//
+//
+//  BURS instruction selection for SPARC V9 architecture.      
+//
+//===----------------------------------------------------------------------===//
 
 #include "SparcInternals.h"
 #include "SparcInstrSelectionSupport.h"
@@ -24,7 +18,6 @@
 #include "llvm/iTerminators.h"
 #include "llvm/iMemory.h"
 #include "llvm/iOther.h"
-#include "llvm/BasicBlock.h"
 #include "llvm/Function.h"
 #include "llvm/Constants.h"
 #include "Support/MathExtras.h"
diff --git a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
index 2ee9294..b076db1 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
+++ b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
@@ -1,19 +1,13 @@
-// $Id$ -*-c++-*-
-//***************************************************************************
-// File:
-//	SparcInstrSelectionSupport.h
-// 
-// Purpose:
-// 
-// History:
-//	10/17/01	 -  Vikram Adve  -  Created
-//**************************************************************************/
+//===-- llvm/CodeGen/SparcInstrSelectionSupport.h ---------------*- C++ -*-===//
+//
+//
+//
+//===----------------------------------------------------------------------===//
 
 #ifndef SPARC_INSTR_SELECTION_SUPPORT_h
 #define SPARC_INSTR_SELECTION_SUPPORT_h
 
 #include "llvm/DerivedTypes.h"
-#include "llvm/Value.h"
 
 inline MachineOpCode
 ChooseLoadInstruction(const Type *DestTy)
@@ -37,7 +31,6 @@
   return 0;
 }
 
-
 inline MachineOpCode
 ChooseStoreInstruction(const Type *DestTy)
 {
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index aea653e..157004a 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -1,12 +1,9 @@
-//***************************************************************************
-// File:
-//	SparcInternals.h
+//===-- SparcInternals.h ----------------------------------------*- C++ -*-===//
 // 
-// Purpose:
-//       This file defines stuff that is to be private to the Sparc
-//       backend, but is shared among different portions of the backend.
-//**************************************************************************/
-
+// This file defines stuff that is to be private to the Sparc backend, but is
+// shared among different portions of the backend.
+//
+//===----------------------------------------------------------------------===//
 
 #ifndef SPARC_INTERNALS_H
 #define SPARC_INTERNALS_H
@@ -86,9 +83,8 @@
 //   default to member functions in base class MachineInstrInfo. 
 //---------------------------------------------------------------------------
 
-class UltraSparcInstrInfo : public MachineInstrInfo {
-public:
-  /*ctor*/	UltraSparcInstrInfo(const TargetMachine& tgt);
+struct UltraSparcInstrInfo : public MachineInstrInfo {
+  UltraSparcInstrInfo(const TargetMachine& tgt);
 
   //
   // All immediate constants are in position 1 except the
diff --git a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
index 1ee41e6..179039c 100644
--- a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
+++ b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
@@ -18,8 +18,6 @@
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/Pass.h"
 #include "llvm/Function.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Instruction.h"
 
 namespace {
   class InsertPrologEpilogCode : public FunctionPass {