diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index 5199b67..6482823 100644
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -13,7 +13,7 @@
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
                 SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
-                SparcV8GenInstrInfo.inc SparcV8GenCodeEmitter.inc
+                SparcV8GenInstrInfo.inc
 
 include $(LEVEL)/Makefile.common
 
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index d2c7265..ce9768e 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -34,11 +34,7 @@
                                            IntrinsicLowering *IL,
                                            const std::string &FS)
   : TargetMachine("SparcV8", IL, false, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
-}
-
-unsigned SparcV8TargetMachine::getJITMatchQuality() {
-  return 0; // No JIT yet.
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
 
 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
@@ -57,7 +53,7 @@
            M.getPointerSize() != Module::AnyPointerSize)
     return 0;                                    // Match for some other target
 
-  return getJITMatchQuality()/2;
+  return 0;
 }
 
 /// addPassesToEmitFile - Add passes to the specified pass manager
@@ -120,50 +116,3 @@
   return false;
 }
 
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-  // FIXME: Implement efficient support for garbage collection intrinsics.
-  PM.add(createLowerGCPass());
-
-  // Replace malloc and free instructions with library calls.
-  PM.add(createLowerAllocationsPass());
-
-  // FIXME: implement the switch instruction in the instruction selector.
-  PM.add(createLowerSwitchPass());
-
-  // FIXME: implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
-
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
-  // FIXME: implement the select instruction in the instruction selector.
-  PM.add(createLowerSelectPass());
-
-  // Print LLVM code input to instruction selector:
-  if (PrintMachineCode)
-    PM.add(new PrintFunctionPass());
-
-  PM.add(createSparcV8SimpleInstructionSelector(TM));
-
-  // Print machine instructions as they were initially generated.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
-
-  // Print machine instructions after register allocation and prolog/epilog
-  // insertion.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createSparcV8FPMoverPass(TM));
-  PM.add(createSparcV8DelaySlotFillerPass(TM));
-
-  // Print machine instructions after filling delay slots.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-}
diff --git a/lib/Target/Sparc/SparcTargetMachine.h b/lib/Target/Sparc/SparcTargetMachine.h
index d0dfa4e..1f3096b 100644
--- a/lib/Target/Sparc/SparcTargetMachine.h
+++ b/lib/Target/Sparc/SparcTargetMachine.h
@@ -18,7 +18,6 @@
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/PassManager.h"
 #include "SparcV8InstrInfo.h"
-#include "SparcV8JITInfo.h"
 
 namespace llvm {
 
@@ -28,7 +27,6 @@
 class SparcV8TargetMachine : public TargetMachine {
   SparcV8InstrInfo InstrInfo;
   TargetFrameInfo FrameInfo;
-  SparcV8JITInfo JITInfo;
 public:
   SparcV8TargetMachine(const Module &M, IntrinsicLowering *IL,
                        const std::string &FS);
@@ -38,15 +36,8 @@
   virtual const MRegisterInfo *getRegisterInfo() const {
     return &InstrInfo.getRegisterInfo();
   }
-  virtual TargetJITInfo *getJITInfo() {
-    return &JITInfo;
-  }
 
   static unsigned getModuleMatchQuality(const Module &M);
-  static unsigned getJITMatchQuality();
-
-  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
-                                          MachineCodeEmitter &MCE);
 
   virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
                                    CodeGenFileType FileType, bool Fast);
diff --git a/lib/Target/Sparc/SparcV8CodeEmitter.cpp b/lib/Target/Sparc/SparcV8CodeEmitter.cpp
deleted file mode 100644
index da0beaf..0000000
--- a/lib/Target/Sparc/SparcV8CodeEmitter.cpp
+++ /dev/null
@@ -1,183 +0,0 @@
-//===-- SparcV8CodeEmitter.cpp - JIT Code Emitter for SparcV8 -----*- C++ -*-=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-//
-//===----------------------------------------------------------------------===//
-
-#include "SparcV8.h"
-#include "SparcV8TargetMachine.h"
-#include "llvm/Module.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/Debug.h"
-#include <cstdlib>
-#include <map>
-#include <vector>
-using namespace llvm;
-
-namespace {
-  class SparcV8CodeEmitter : public MachineFunctionPass {
-    TargetMachine &TM;
-    MachineCodeEmitter &MCE;
-
-    /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
-    ///
-    int64_t getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
-
-    // Tracks which instruction references which BasicBlock
-    std::vector<std::pair<const BasicBlock*,
-                          std::pair<unsigned*,MachineInstr*> > > BBRefs;
-    // Tracks where each BasicBlock starts
-    std::map<const BasicBlock*, long> BBLocations;
-
-  public:
-    SparcV8CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
-      : TM(T), MCE(M) {}
-
-    const char *getPassName() const { return "SparcV8 Machine Code Emitter"; }
-
-    /// runOnMachineFunction - emits the given MachineFunction to memory
-    ///
-    bool runOnMachineFunction(MachineFunction &MF);
-
-    /// emitBasicBlock - emits the given MachineBasicBlock to memory
-    ///
-    void emitBasicBlock(MachineBasicBlock &MBB);
-
-    /// emitWord - write a 32-bit word to memory at the current PC
-    ///
-    void emitWord(unsigned w) { MCE.emitWord(w); }
-
-    /// getValueBit - return the particular bit of Val
-    ///
-    unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
-
-    /// getBinaryCodeForInstr - This function, generated by the
-    /// CodeEmitterGenerator using TableGen, produces the binary encoding for
-    /// machine instructions.
-    ///
-    unsigned getBinaryCodeForInstr(MachineInstr &MI);
-  };
-}
-
-/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
-/// machine code emitted.  This uses a MachineCodeEmitter object to handle
-/// actually outputting the machine code and resolving things like the address
-/// of functions.  This method should returns true if machine code emission is
-/// not supported.
-///
-bool SparcV8TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
-                                                      MachineCodeEmitter &MCE) {
-  // Keep as `true' until this is a functional JIT to allow llvm-gcc to build
-  return true;
-
-  // Machine code emitter pass for SparcV8
-  PM.add(new SparcV8CodeEmitter(*this, MCE));
-  // Delete machine code for this function after emitting it
-  PM.add(createMachineCodeDeleter());
-  return false;
-}
-
-bool SparcV8CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
-  MCE.startFunction(MF);
-  MCE.emitConstantPool(MF.getConstantPool());
-  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
-    emitBasicBlock(*I);
-  MCE.finishFunction(MF);
-
-  // Resolve branches to BasicBlocks for the entire function
-  for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
-    long Location = BBLocations[BBRefs[i].first];
-    unsigned *Ref = BBRefs[i].second.first;
-    MachineInstr *MI = BBRefs[i].second.second;
-    DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
-                    << " in instr: " << std::dec << *MI);
-    for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
-      MachineOperand &op = MI->getOperand(ii);
-      if (op.isPCRelativeDisp()) {
-        // the instruction's branch target is made such that it branches to
-        // PC + (branchTarget * 4), so undo that arithmetic here:
-        // Location is the target of the branch
-        // Ref is the location of the instruction, and hence the PC
-        int64_t branchTarget = (Location - (long)Ref) >> 2;
-        MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
-                                   branchTarget);
-        unsigned fixedInstr = SparcV8CodeEmitter::getBinaryCodeForInstr(*MI);
-        MCE.emitWordAt(fixedInstr, Ref);
-        break;
-      }
-    }
-  }
-  BBRefs.clear();
-  BBLocations.clear();
-
-  return false;
-}
-
-void SparcV8CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
-  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
-    emitWord(getBinaryCodeForInstr(*I));
-}
-
-int64_t SparcV8CodeEmitter::getMachineOpValue(MachineInstr &MI,
-                                            MachineOperand &MO) {
-  int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
-                  // or things that get fixed up later by the JIT.
-  if (MO.isPCRelativeDisp()) {
-    std::cerr << "SparcV8CodeEmitter: PC-relative disp unhandled\n";
-    abort();
-  } else if (MO.isRegister()) {
-    rv = MO.getReg();
-  } else if (MO.isImmediate()) {
-    rv = MO.getImmedValue();
-  } else if (MO.isGlobalAddress()) {
-    GlobalValue *GV = MO.getGlobal();
-    std::cerr << "Unhandled global value: " << GV << "\n";
-    abort();
-  } else if (MO.isMachineBasicBlock()) {
-    const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
-    unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
-    BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
-  } else if (MO.isExternalSymbol()) {
-  } else if (MO.isConstantPoolIndex()) {
-    unsigned index = MO.getConstantPoolIndex();
-    rv = MCE.getConstantPoolEntryAddress(index);
-  } else if (MO.isFrameIndex()) {
-    std::cerr << "SparcV8CodeEmitter: error: Frame index unhandled!\n";
-    abort();
-  } else {
-    std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
-    abort();
-  }
-
-  // Adjust for special meaning of operands in some instructions
-  unsigned Opcode = MI.getOpcode();
-  if (Opcode == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
-    rv &= 0x03ff;
-  } else if (Opcode == V8::ORri &&!MO.isRegister() &&!MO.isImmediate()) {
-    rv = (rv >> 10) & 0x03fffff;
-  }
-
-  return rv;
-}
-
-void *SparcV8JITInfo::getJITStubForFunction(Function *F,
-                                            MachineCodeEmitter &MCE) {
-  std::cerr << "SparcV8JITInfo::getJITStubForFunction not implemented!\n";
-  abort();
-  return 0;
-}
-
-void SparcV8JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
-  std::cerr << "SparcV8JITInfo::replaceMachineCodeForFunction not implemented!";
-  abort();
-}
-
-#include "SparcV8GenCodeEmitter.inc"
diff --git a/lib/Target/Sparc/SparcV8JITInfo.h b/lib/Target/Sparc/SparcV8JITInfo.h
deleted file mode 100644
index b17eb3d..0000000
--- a/lib/Target/Sparc/SparcV8JITInfo.h
+++ /dev/null
@@ -1,49 +0,0 @@
-//===- SparcV8JITInfo.h - SparcV8 impl. of the JIT interface ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the SparcV8 implementation of the TargetJITInfo class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef SPARCV8JITINFO_H
-#define SPARCV8JITINFO_H
-
-#include "llvm/Target/TargetJITInfo.h"
-
-namespace llvm {
-  class TargetMachine;
-  class IntrinsicLowering;
-
-  class SparcV8JITInfo : public TargetJITInfo {
-    TargetMachine &TM;
-  public:
-    SparcV8JITInfo(TargetMachine &tm) : TM(tm) {}
-
-    /// addPassesToJITCompile - Add passes to the specified pass manager to
-    /// implement a fast dynamic compiler for this target.  Return true if this
-    /// is not supported for this target.
-    ///
-    virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
-    /// replaceMachineCodeForFunction - Make it so that calling the function
-    /// whose machine code is at OLD turns into a call to NEW, perhaps by
-    /// overwriting OLD with a branch to NEW.  This is used for self-modifying
-    /// code.
-    ///
-    virtual void replaceMachineCodeForFunction(void *Old, void *New);
-
-    /// getJITStubForFunction - Create or return a stub for the specified
-    /// function.  This stub acts just like the specified function, except that
-    /// it allows the "address" of the function to be taken without having to
-    /// generate code for it.
-    virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE);
-  };
-}
-
-#endif
diff --git a/lib/Target/SparcV8/Makefile b/lib/Target/SparcV8/Makefile
index 5199b67..6482823 100644
--- a/lib/Target/SparcV8/Makefile
+++ b/lib/Target/SparcV8/Makefile
@@ -13,7 +13,7 @@
 # Make sure that tblgen is run, first thing.
 BUILT_SOURCES = SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
                 SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
-                SparcV8GenInstrInfo.inc SparcV8GenCodeEmitter.inc
+                SparcV8GenInstrInfo.inc
 
 include $(LEVEL)/Makefile.common
 
diff --git a/lib/Target/SparcV8/SparcV8CodeEmitter.cpp b/lib/Target/SparcV8/SparcV8CodeEmitter.cpp
deleted file mode 100644
index da0beaf..0000000
--- a/lib/Target/SparcV8/SparcV8CodeEmitter.cpp
+++ /dev/null
@@ -1,183 +0,0 @@
-//===-- SparcV8CodeEmitter.cpp - JIT Code Emitter for SparcV8 -----*- C++ -*-=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-//
-//===----------------------------------------------------------------------===//
-
-#include "SparcV8.h"
-#include "SparcV8TargetMachine.h"
-#include "llvm/Module.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/Debug.h"
-#include <cstdlib>
-#include <map>
-#include <vector>
-using namespace llvm;
-
-namespace {
-  class SparcV8CodeEmitter : public MachineFunctionPass {
-    TargetMachine &TM;
-    MachineCodeEmitter &MCE;
-
-    /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
-    ///
-    int64_t getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
-
-    // Tracks which instruction references which BasicBlock
-    std::vector<std::pair<const BasicBlock*,
-                          std::pair<unsigned*,MachineInstr*> > > BBRefs;
-    // Tracks where each BasicBlock starts
-    std::map<const BasicBlock*, long> BBLocations;
-
-  public:
-    SparcV8CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
-      : TM(T), MCE(M) {}
-
-    const char *getPassName() const { return "SparcV8 Machine Code Emitter"; }
-
-    /// runOnMachineFunction - emits the given MachineFunction to memory
-    ///
-    bool runOnMachineFunction(MachineFunction &MF);
-
-    /// emitBasicBlock - emits the given MachineBasicBlock to memory
-    ///
-    void emitBasicBlock(MachineBasicBlock &MBB);
-
-    /// emitWord - write a 32-bit word to memory at the current PC
-    ///
-    void emitWord(unsigned w) { MCE.emitWord(w); }
-
-    /// getValueBit - return the particular bit of Val
-    ///
-    unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
-
-    /// getBinaryCodeForInstr - This function, generated by the
-    /// CodeEmitterGenerator using TableGen, produces the binary encoding for
-    /// machine instructions.
-    ///
-    unsigned getBinaryCodeForInstr(MachineInstr &MI);
-  };
-}
-
-/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
-/// machine code emitted.  This uses a MachineCodeEmitter object to handle
-/// actually outputting the machine code and resolving things like the address
-/// of functions.  This method should returns true if machine code emission is
-/// not supported.
-///
-bool SparcV8TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
-                                                      MachineCodeEmitter &MCE) {
-  // Keep as `true' until this is a functional JIT to allow llvm-gcc to build
-  return true;
-
-  // Machine code emitter pass for SparcV8
-  PM.add(new SparcV8CodeEmitter(*this, MCE));
-  // Delete machine code for this function after emitting it
-  PM.add(createMachineCodeDeleter());
-  return false;
-}
-
-bool SparcV8CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
-  MCE.startFunction(MF);
-  MCE.emitConstantPool(MF.getConstantPool());
-  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
-    emitBasicBlock(*I);
-  MCE.finishFunction(MF);
-
-  // Resolve branches to BasicBlocks for the entire function
-  for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
-    long Location = BBLocations[BBRefs[i].first];
-    unsigned *Ref = BBRefs[i].second.first;
-    MachineInstr *MI = BBRefs[i].second.second;
-    DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
-                    << " in instr: " << std::dec << *MI);
-    for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
-      MachineOperand &op = MI->getOperand(ii);
-      if (op.isPCRelativeDisp()) {
-        // the instruction's branch target is made such that it branches to
-        // PC + (branchTarget * 4), so undo that arithmetic here:
-        // Location is the target of the branch
-        // Ref is the location of the instruction, and hence the PC
-        int64_t branchTarget = (Location - (long)Ref) >> 2;
-        MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
-                                   branchTarget);
-        unsigned fixedInstr = SparcV8CodeEmitter::getBinaryCodeForInstr(*MI);
-        MCE.emitWordAt(fixedInstr, Ref);
-        break;
-      }
-    }
-  }
-  BBRefs.clear();
-  BBLocations.clear();
-
-  return false;
-}
-
-void SparcV8CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
-  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
-    emitWord(getBinaryCodeForInstr(*I));
-}
-
-int64_t SparcV8CodeEmitter::getMachineOpValue(MachineInstr &MI,
-                                            MachineOperand &MO) {
-  int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
-                  // or things that get fixed up later by the JIT.
-  if (MO.isPCRelativeDisp()) {
-    std::cerr << "SparcV8CodeEmitter: PC-relative disp unhandled\n";
-    abort();
-  } else if (MO.isRegister()) {
-    rv = MO.getReg();
-  } else if (MO.isImmediate()) {
-    rv = MO.getImmedValue();
-  } else if (MO.isGlobalAddress()) {
-    GlobalValue *GV = MO.getGlobal();
-    std::cerr << "Unhandled global value: " << GV << "\n";
-    abort();
-  } else if (MO.isMachineBasicBlock()) {
-    const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
-    unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
-    BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
-  } else if (MO.isExternalSymbol()) {
-  } else if (MO.isConstantPoolIndex()) {
-    unsigned index = MO.getConstantPoolIndex();
-    rv = MCE.getConstantPoolEntryAddress(index);
-  } else if (MO.isFrameIndex()) {
-    std::cerr << "SparcV8CodeEmitter: error: Frame index unhandled!\n";
-    abort();
-  } else {
-    std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
-    abort();
-  }
-
-  // Adjust for special meaning of operands in some instructions
-  unsigned Opcode = MI.getOpcode();
-  if (Opcode == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
-    rv &= 0x03ff;
-  } else if (Opcode == V8::ORri &&!MO.isRegister() &&!MO.isImmediate()) {
-    rv = (rv >> 10) & 0x03fffff;
-  }
-
-  return rv;
-}
-
-void *SparcV8JITInfo::getJITStubForFunction(Function *F,
-                                            MachineCodeEmitter &MCE) {
-  std::cerr << "SparcV8JITInfo::getJITStubForFunction not implemented!\n";
-  abort();
-  return 0;
-}
-
-void SparcV8JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
-  std::cerr << "SparcV8JITInfo::replaceMachineCodeForFunction not implemented!";
-  abort();
-}
-
-#include "SparcV8GenCodeEmitter.inc"
diff --git a/lib/Target/SparcV8/SparcV8JITInfo.h b/lib/Target/SparcV8/SparcV8JITInfo.h
deleted file mode 100644
index b17eb3d..0000000
--- a/lib/Target/SparcV8/SparcV8JITInfo.h
+++ /dev/null
@@ -1,49 +0,0 @@
-//===- SparcV8JITInfo.h - SparcV8 impl. of the JIT interface ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains the SparcV8 implementation of the TargetJITInfo class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef SPARCV8JITINFO_H
-#define SPARCV8JITINFO_H
-
-#include "llvm/Target/TargetJITInfo.h"
-
-namespace llvm {
-  class TargetMachine;
-  class IntrinsicLowering;
-
-  class SparcV8JITInfo : public TargetJITInfo {
-    TargetMachine &TM;
-  public:
-    SparcV8JITInfo(TargetMachine &tm) : TM(tm) {}
-
-    /// addPassesToJITCompile - Add passes to the specified pass manager to
-    /// implement a fast dynamic compiler for this target.  Return true if this
-    /// is not supported for this target.
-    ///
-    virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
-    /// replaceMachineCodeForFunction - Make it so that calling the function
-    /// whose machine code is at OLD turns into a call to NEW, perhaps by
-    /// overwriting OLD with a branch to NEW.  This is used for self-modifying
-    /// code.
-    ///
-    virtual void replaceMachineCodeForFunction(void *Old, void *New);
-
-    /// getJITStubForFunction - Create or return a stub for the specified
-    /// function.  This stub acts just like the specified function, except that
-    /// it allows the "address" of the function to be taken without having to
-    /// generate code for it.
-    virtual void *getJITStubForFunction(Function *F, MachineCodeEmitter &MCE);
-  };
-}
-
-#endif
diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index d2c7265..ce9768e 100644
--- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -34,11 +34,7 @@
                                            IntrinsicLowering *IL,
                                            const std::string &FS)
   : TargetMachine("SparcV8", IL, false, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
-}
-
-unsigned SparcV8TargetMachine::getJITMatchQuality() {
-  return 0; // No JIT yet.
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
 
 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
@@ -57,7 +53,7 @@
            M.getPointerSize() != Module::AnyPointerSize)
     return 0;                                    // Match for some other target
 
-  return getJITMatchQuality()/2;
+  return 0;
 }
 
 /// addPassesToEmitFile - Add passes to the specified pass manager
@@ -120,50 +116,3 @@
   return false;
 }
 
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-  // FIXME: Implement efficient support for garbage collection intrinsics.
-  PM.add(createLowerGCPass());
-
-  // Replace malloc and free instructions with library calls.
-  PM.add(createLowerAllocationsPass());
-
-  // FIXME: implement the switch instruction in the instruction selector.
-  PM.add(createLowerSwitchPass());
-
-  // FIXME: implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
-
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
-  // FIXME: implement the select instruction in the instruction selector.
-  PM.add(createLowerSelectPass());
-
-  // Print LLVM code input to instruction selector:
-  if (PrintMachineCode)
-    PM.add(new PrintFunctionPass());
-
-  PM.add(createSparcV8SimpleInstructionSelector(TM));
-
-  // Print machine instructions as they were initially generated.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
-
-  // Print machine instructions after register allocation and prolog/epilog
-  // insertion.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  PM.add(createSparcV8FPMoverPass(TM));
-  PM.add(createSparcV8DelaySlotFillerPass(TM));
-
-  // Print machine instructions after filling delay slots.
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-}
diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.h b/lib/Target/SparcV8/SparcV8TargetMachine.h
index d0dfa4e..1f3096b 100644
--- a/lib/Target/SparcV8/SparcV8TargetMachine.h
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.h
@@ -18,7 +18,6 @@
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/PassManager.h"
 #include "SparcV8InstrInfo.h"
-#include "SparcV8JITInfo.h"
 
 namespace llvm {
 
@@ -28,7 +27,6 @@
 class SparcV8TargetMachine : public TargetMachine {
   SparcV8InstrInfo InstrInfo;
   TargetFrameInfo FrameInfo;
-  SparcV8JITInfo JITInfo;
 public:
   SparcV8TargetMachine(const Module &M, IntrinsicLowering *IL,
                        const std::string &FS);
@@ -38,15 +36,8 @@
   virtual const MRegisterInfo *getRegisterInfo() const {
     return &InstrInfo.getRegisterInfo();
   }
-  virtual TargetJITInfo *getJITInfo() {
-    return &JITInfo;
-  }
 
   static unsigned getModuleMatchQuality(const Module &M);
-  static unsigned getJITMatchQuality();
-
-  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
-                                          MachineCodeEmitter &MCE);
 
   virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
                                    CodeGenFileType FileType, bool Fast);