commit 04b304caf633a471946c59c7d313e1560c5d07a5
author Chris Lattner <sabre@nondot.org> Fri Jul 10 05:37:11 2009 +0000
committer Chris Lattner <sabre@nondot.org> Fri Jul 10 05:37:11 2009 +0000
tree 5978d385c7544f2138a772104919327d6c9ba70a
parent 0aa43de1d0ef6b5ba3a1dd7fe4f2d40797d96f5a

the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75229 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 35c9056..8084cd5 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7078,7 +7078,7 @@
     if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine(), false))
       return false;
     // If BaseGV requires a register, we cannot also have a BaseReg.
-    if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine(), false) &&
+    if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine()) &&
         AM.HasBaseReg)
       return false;
 
@@ -8841,8 +8841,8 @@
     }
     // If we require an extra load to get this address, as in PIC mode, we
     // can't accept it.
-    if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(),
-                                       getTargetMachine(), false))
+    if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine(),
+                                       false))
       return;
 
     if (hasMemory)