Add half support to LLVM (for OpenCL)
Submitted by: Anton Lokhmotov <Anton.Lokhmotov@arm.com>
Approved by: o Anton Korobeynikov
o Micah Villmow
o David Neto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157393 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/docs/BitCodeFormat.html b/docs/BitCodeFormat.html
index a8777ee..30145de 100644
--- a/docs/BitCodeFormat.html
+++ b/docs/BitCodeFormat.html
@@ -1145,6 +1145,18 @@
</div>
<!-- _______________________________________________________________________ -->
+<h4><a name="TYPE_CODE_HALF">TYPE_CODE_HALF Record</a></h4>
+
+<div>
+
+<p><tt>[HALF]</tt></p>
+
+<p>The <tt>HALF</tt> record (code 10) adds a <tt>half</tt> (16-bit
+floating point) type to the type table.
+</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
<h4><a name="TYPE_CODE_FLOAT">TYPE_CODE_FLOAT Record</a></h4>
<div>
diff --git a/docs/LangRef.html b/docs/LangRef.html
index 8f7a17c..a781992 100644
--- a/docs/LangRef.html
+++ b/docs/LangRef.html
@@ -2289,8 +2289,9 @@
by <tt>0xM</tt> followed by 32 hexadecimal digits. The IEEE 128-bit format
is represented by <tt>0xL</tt> followed by 32 hexadecimal digits; no
currently supported target uses this format. Long doubles will only work if
- they match the long double format on your target. All hexadecimal formats
- are big-endian (sign bit at the left).</p>
+ they match the long double format on your target. The IEEE 16-bit format
+ (half precision) is represented by <tt>0xH</tt> followed by 4 hexadecimal
+ digits. All hexadecimal formats are big-endian (sign bit at the left).</p>
<p>There are no constants of type x86mmx.</p>
</div>
@@ -7947,7 +7948,8 @@
<div>
-<p>Half precision floating point is a storage-only format. This means that it is
+<p>For most target platforms, half precision floating point is a storage-only
+ format. This means that it is
a dense encoding (in memory) but does not support computation in the
format.</p>