commit 08d52071bae2f8cc2e9aa6a451118b83d043813b
author Christopher Lamb <christopher.lamb@gmail.com> Thu Jul 26 07:48:21 2007 +0000
committer Christopher Lamb <christopher.lamb@gmail.com> Thu Jul 26 07:48:21 2007 +0000
tree 7467f6e03f13c84aad5031e90ba99b9a60f1c622
parent 518143d7950fb02683b9675e94d42c112ed599c4

Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 300a100..77907ac 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -26,7 +26,9 @@
     Record *R = *I;
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
-        R->getName() == "LABEL") continue;
+        R->getName() == "LABEL" ||
+        R->getName() == "EXTRACT_SUBREG" ||
+        R->getName() == "INSERT_SUBREG") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -97,7 +99,9 @@
     
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
-        R->getName() == "LABEL") {
+        R->getName() == "LABEL" ||
+        R->getName() == "EXTRACT_SUBREG" ||
+        R->getName() == "INSERT_SUBREG") {
       o << "    0U";
       continue;
     }
@@ -127,7 +131,9 @@
     
     if (InstName == "PHI" ||
         InstName == "INLINEASM" ||
-        InstName == "LABEL") continue;
+        InstName == "LABEL"||
+        InstName == "EXTRACT_SUBREG" ||
+        InstName == "INSERT_SUBREG") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();