commit 09dd60feef61bc59a71585e05580c142a15bbcf0
author Akira Hatanaka <ahatanak@gmail.com> Mon Sep 26 21:37:50 2011 +0000
committer Akira Hatanaka <ahatanak@gmail.com> Mon Sep 26 21:37:50 2011 +0000
tree 25b3232c72bfb55ea779f2f2eca896a44f862d2d
parent 47d3ee559a4bbac97db38c84e9c89e56eedc6fb9

In single float mode, double precision FP arguments are passed in integer
registers, so there is no need to check here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsISelLowering.cpp

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 77650c7..130e359 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2267,10 +2267,9 @@
         RC = Mips::CPU64RegsRegisterClass;
       else if (RegVT == MVT::f32)
         RC = Mips::FGR32RegisterClass;
-      else if (RegVT == MVT::f64) {
-        if (!Subtarget->isSingleFloat())
-          RC = Mips::AFGR64RegisterClass;
-      } else
+      else if (RegVT == MVT::f64)
+        RC = Mips::AFGR64RegisterClass;
+      else
         llvm_unreachable("RegVT not supported by FormalArguments Lowering");
 
       // Transform the arguments stored on