Make sure we use the correct register class here since we'll need to
care about spill values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 54433a4..daf9555 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -835,7 +835,8 @@
case 'r':
return std::make_pair(0U, Alpha::GPRCRegisterClass);
case 'f':
- return std::make_pair(0U, Alpha::F4RCRegisterClass);
+ return VT == MVT::f64 ? std::make_pair(0U, Alpha::F8RCRegisterClass) :
+ std::make_pair(0U, Alpha::F4RCRegisterClass);
}
}
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);