Adding working version of assembly parser for the MBlaze backend
Major cleanup of whitespace and formatting issues in MBlaze backend


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118434 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
index 8918b48..32424e5 100644
--- a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
+++ b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
@@ -36,7 +36,7 @@
     const TargetInstrInfo *TII;
 
     static char ID;
-    Filler(TargetMachine &tm) 
+    Filler(TargetMachine &tm)
       : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
 
     virtual const char *getPassName() const {
@@ -56,44 +56,44 @@
   char Filler::ID = 0;
 } // end of anonymous namespace
 
-static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
+static bool hasImmInstruction(MachineBasicBlock::iterator &candidate) {
     // Any instruction with an immediate mode operand greater than
     // 16-bits requires an implicit IMM instruction.
     unsigned numOper = candidate->getNumOperands();
-    for( unsigned op = 0; op < numOper; ++op ) {
-        if( candidate->getOperand(op).isImm() &&
-            (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
+    for (unsigned op = 0; op < numOper; ++op) {
+        if (candidate->getOperand(op).isImm() &&
+            (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0)
             return true;
 
         // FIXME: we could probably check to see if the FP value happens
         //        to not need an IMM instruction. For now we just always
         //        assume that FP values always do.
-        if( candidate->getOperand(op).isFPImm() )
+        if (candidate->getOperand(op).isFPImm())
             return true;
     }
 
     return false;
 }
 
-static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
-                            MachineBasicBlock::iterator &slot ) {
+static bool delayHasHazard(MachineBasicBlock::iterator &candidate,
+                           MachineBasicBlock::iterator &slot) {
 
     // Loop over all of the operands in the branch instruction
     // and make sure that none of them are defined by the
     // candidate instruction.
     unsigned numOper = slot->getNumOperands();
-    for( unsigned op = 0; op < numOper; ++op ) {
-        if( !slot->getOperand(op).isReg() || 
+    for (unsigned op = 0; op < numOper; ++op) {
+        if (!slot->getOperand(op).isReg() ||
             !slot->getOperand(op).isUse() ||
-            slot->getOperand(op).isImplicit() )
+            slot->getOperand(op).isImplicit())
             continue;
 
         unsigned cnumOper = candidate->getNumOperands();
-        for( unsigned cop = 0; cop < cnumOper; ++cop ) {
-            if( candidate->getOperand(cop).isReg() &&
+        for (unsigned cop = 0; cop < cnumOper; ++cop) {
+            if (candidate->getOperand(cop).isReg() &&
                 candidate->getOperand(cop).isDef() &&
-                candidate->getOperand(cop).getReg() == 
-                slot->getOperand(op).getReg() )
+                candidate->getOperand(cop).getReg() ==
+                slot->getOperand(op).getReg())
                 return true;
         }
     }
@@ -102,20 +102,20 @@
     return false;
 }
 
-static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
-                                 MachineBasicBlock::iterator &slot ) {
+static bool usedBeforeDelaySlot(MachineBasicBlock::iterator &candidate,
+                                MachineBasicBlock::iterator &slot) {
   MachineBasicBlock::iterator I = candidate;
   for (++I; I != slot; ++I) {
         unsigned numOper = I->getNumOperands();
-        for( unsigned op = 0; op < numOper; ++op ) {
-            if( I->getOperand(op).isReg() &&
-                I->getOperand(op).isUse() ) {
+        for (unsigned op = 0; op < numOper; ++op) {
+            if (I->getOperand(op).isReg() &&
+                I->getOperand(op).isUse()) {
                 unsigned reg = I->getOperand(op).getReg();
                 unsigned cops = candidate->getNumOperands();
-                for( unsigned cop = 0; cop < cops; ++cop ) {
-                    if( candidate->getOperand(cop).isReg() &&
+                for (unsigned cop = 0; cop < cops; ++cop) {
+                    if (candidate->getOperand(cop).isReg() &&
                         candidate->getOperand(cop).isDef() &&
-                        candidate->getOperand(cop).getReg() == reg )
+                        candidate->getOperand(cop).getReg() == reg)
                         return true;
                 }
             }
@@ -130,9 +130,9 @@
   MachineBasicBlock::iterator found = MBB.end();
   for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
       TargetInstrDesc desc = I->getDesc();
-      if( desc.hasDelaySlot() || desc.isBranch() || 
-          desc.mayLoad() || desc.    mayStore() || 
-          hasImmInstruction(I) || delayHasHazard(I,slot) || 
+      if (desc.hasDelaySlot() || desc.isBranch() ||
+          desc.mayLoad() || desc.    mayStore() ||
+          hasImmInstruction(I) || delayHasHazard(I,slot) ||
           usedBeforeDelaySlot(I,slot)) continue;
 
       found = I;
@@ -155,10 +155,10 @@
       ++FilledSlots;
       Changed = true;
 
-      if( D == MBB.end() )
+      if (D == MBB.end())
         BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
       else
-        MBB.splice( J, &MBB, D );
+        MBB.splice(J, &MBB, D);
     }
   return Changed;
 }