commit 0a783f783ca05c961234385f5b269d4cf03dbbdb
author Reid Spencer <rspencer@reidspencer.com> Thu Nov 02 01:53:59 2006 +0000
committer Reid Spencer <rspencer@reidspencer.com> Thu Nov 02 01:53:59 2006 +0000
tree 70d2d2b4be7b0f5624d954fd3c482eca33c7f43e
parent 0ac6757586b80d0c82a6651780dcd9b09df251b0

For PR950:
Replace the REM instruction with UREM, SREM and FREM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8

lib/VMCore/Instruction.cpp

diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp
index 9b5fa71..355c508 100644
--- a/lib/VMCore/Instruction.cpp
+++ b/lib/VMCore/Instruction.cpp
@@ -97,7 +97,9 @@
   case UDiv: return "udiv";
   case SDiv: return "sdiv";
   case FDiv: return "fdiv";
-  case Rem: return "rem";
+  case URem: return "urem";
+  case SRem: return "srem";
+  case FRem: return "frem";
 
   // Logical operators...
   case And: return "and";
@@ -227,7 +229,9 @@
   case UDiv:
   case SDiv:
   case FDiv:
-  case Rem:
+  case URem:
+  case SRem:
+  case FRem:
   case Load:
   case Store:
   case Call: