commit 0aba3ab898632efa8f4da6f2cbd3eb35bbe2dd24
author Bill Wendling <isanbard@gmail.com> Sat Dec 08 07:17:56 2007 +0000
committer Bill Wendling <isanbard@gmail.com> Sat Dec 08 07:17:56 2007 +0000
tree 1a00b2417e9e4f4875214abcece0477e236f50c4
parent 9e4556dbe5cdaa423e247cb19fac2da3b23a7b01

Renaming:

  isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44702 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrInfo.cpp

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 9d5e637..880e2fd 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -116,7 +116,7 @@
 }
 
 
-bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
+bool X86InstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const {
   switch (MI->getOpcode()) {
   default: break;
   case X86::MOV8rm: