commit 0c794b87253bcd597f87960632f8654a151f37ec
author Rafael Espindola <rafael.espindola@gmail.com> Mon Aug 03 03:27:05 2009 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Mon Aug 03 03:27:05 2009 +0000
tree dc91d5d2cd05b4c23d786343d90442db5709cafb
parent cc2b67af91b199ab234afc9e26dee09b056cf4a0

Fix the instruction encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77944 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrMMX.td

diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td
index 0033d83..1a2a3bf 100644
--- a/lib/Target/X86/X86InstrMMX.td
+++ b/lib/Target/X86/X86InstrMMX.td
@@ -164,10 +164,10 @@
                              []>;
 
 let neverHasSideEffects = 1 in {
-def MMX_MOVD64from64rr : MMXRI<0x7F, MRMDestReg,
+def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg,
                                (outs GR64:$dst), (ins VR64:$src),
                                "movq\t{$src, $dst|$dst, $src}", []>;
-def MMX_MOVD64rrv164 : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src),
+def MMX_MOVD64rrv164 : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src),
                             "movq\t{$src, $dst|$dst, $src}",
                             [(set VR64:$dst, (v1i64 (scalar_to_vector GR64:$src)))]>;
 }