shl is always zero extending, so always use a zero extending shift right.
This latent bug was exposed by recent changes, and is tested as:
llvm/test/Regression/Transforms/InstCombine/2004-09-28-BadShiftAndSetCC.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16546 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 1e0e77d..6441b34 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -1506,7 +1506,7 @@
// rights, as they sign-extend.
if (ShAmt) {
bool CanFold = Shift->getOpcode() != Instruction::Shr ||
- Shift->getType()->isUnsigned();
+ Shift->getType()->isUnsigned();
if (!CanFold) {
// To test for the bad case of the signed shr, see if any
// of the bits shifted in could be tested after the mask.
@@ -1519,9 +1519,11 @@
}
if (CanFold) {
- unsigned ShiftOp = Shift->getOpcode() == Instruction::Shl
- ? Instruction::Shr : Instruction::Shl;
- Constant *NewCst = ConstantExpr::get(ShiftOp, CI, ShAmt);
+ Constant *NewCst;
+ if (Shift->getOpcode() == Instruction::Shl)
+ NewCst = ConstantExpr::getUShr(CI, ShAmt);
+ else
+ NewCst = ConstantExpr::getShl(CI, ShAmt);
// Check to see if we are shifting out any of the bits being
// compared.
@@ -1535,7 +1537,12 @@
return ReplaceInstUsesWith(I, ConstantBool::True);
} else {
I.setOperand(1, NewCst);
- LHSI->setOperand(1, ConstantExpr::get(ShiftOp, AndCST,ShAmt));
+ Constant *NewAndCST;
+ if (Shift->getOpcode() == Instruction::Shl)
+ NewAndCST = ConstantExpr::getUShr(AndCST, ShAmt);
+ else
+ NewAndCST = ConstantExpr::getShl(AndCST, ShAmt);
+ LHSI->setOperand(1, NewAndCST);
LHSI->setOperand(0, Shift->getOperand(0));
WorkList.push_back(Shift); // Shift is dead.
AddUsesToWorkList(I);