Allow 64 bit integer values in gpu registers if arch and abi are 64 bit.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156278 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index bb36d76..be22fed 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -3056,8 +3056,10 @@
case 'r':
if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
return std::make_pair(0U, &Mips::CPURegsRegClass);
- assert(VT == MVT::i64 && "Unexpected type.");
- return std::make_pair(0U, &Mips::CPU64RegsRegClass);
+ if (VT == MVT::i64 && HasMips64)
+ return std::make_pair(0U, &Mips::CPU64RegsRegClass);
+ // This will generate an error message
+ return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
case 'f':
if (VT == MVT::f32)
return std::make_pair(0U, &Mips::FGR32RegClass);