Add suppport for ConstantExprs of shufflevectors whose result type is not equal to the
type of the vectors being shuffled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64401 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/Bitcode/LLVMBitCodes.h b/include/llvm/Bitcode/LLVMBitCodes.h
index b0cdb17..f1809a2 100644
--- a/include/llvm/Bitcode/LLVMBitCodes.h
+++ b/include/llvm/Bitcode/LLVMBitCodes.h
@@ -125,7 +125,8 @@
CST_CODE_CE_INSERTELT = 15, // CE_INSERTELT: [opval, opval, opval]
CST_CODE_CE_SHUFFLEVEC = 16, // CE_SHUFFLEVEC: [opval, opval, opval]
CST_CODE_CE_CMP = 17, // CE_CMP: [opty, opval, opval, pred]
- CST_CODE_INLINEASM = 18 // INLINEASM: [sideeffect,asmstr,conststr]
+ CST_CODE_INLINEASM = 18, // INLINEASM: [sideeffect,asmstr,conststr]
+ CST_CODE_CE_SHUFVEC_EX = 19 // SHUFVEC_EX: [opty, opval, opval, opval]
};
/// CastOpcodes - These are values used in the bitcode files to encode which
diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp
index adffe82..2ddfbe3 100644
--- a/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -933,7 +933,7 @@
case bitc::CST_CODE_CE_SHUFFLEVEC: { // CE_SHUFFLEVEC: [opval, opval, opval]
const VectorType *OpTy = dyn_cast<VectorType>(CurTy);
if (Record.size() < 3 || OpTy == 0)
- return Error("Invalid CE_INSERTELT record");
+ return Error("Invalid CE_SHUFFLEVEC record");
Constant *Op0 = ValueList.getConstantFwdRef(Record[0], OpTy);
Constant *Op1 = ValueList.getConstantFwdRef(Record[1], OpTy);
const Type *ShufTy=VectorType::get(Type::Int32Ty, OpTy->getNumElements());
@@ -941,6 +941,18 @@
V = ConstantExpr::getShuffleVector(Op0, Op1, Op2);
break;
}
+ case bitc::CST_CODE_CE_SHUFVEC_EX: { // [opty, opval, opval, opval]
+ const VectorType *RTy = dyn_cast<VectorType>(CurTy);
+ const VectorType *OpTy = dyn_cast<VectorType>(getTypeByID(Record[0]));
+ if (Record.size() < 4 || RTy == 0 || OpTy == 0)
+ return Error("Invalid CE_SHUFVEC_EX record");
+ Constant *Op0 = ValueList.getConstantFwdRef(Record[1], OpTy);
+ Constant *Op1 = ValueList.getConstantFwdRef(Record[2], OpTy);
+ const Type *ShufTy=VectorType::get(Type::Int32Ty, RTy->getNumElements());
+ Constant *Op2 = ValueList.getConstantFwdRef(Record[3], ShufTy);
+ V = ConstantExpr::getShuffleVector(Op0, Op1, Op2);
+ break;
+ }
case bitc::CST_CODE_CE_CMP: { // CE_CMP: [opty, opval, opval, pred]
if (Record.size() < 4) return Error("Invalid CE_CMP record");
const Type *OpTy = getTypeByID(Record[0]);
diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp
index e37c439..5633f0f 100644
--- a/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -643,7 +643,16 @@
Record.push_back(VE.getValueID(C->getOperand(2)));
break;
case Instruction::ShuffleVector:
- Code = bitc::CST_CODE_CE_SHUFFLEVEC;
+ // If the return type and argument types are the same, this is a
+ // standard shufflevector instruction. If the types are different,
+ // then the shuffle is widening or truncating the input vectors, and
+ // the argument type must also be encoded.
+ if (C->getType() == C->getOperand(0)->getType()) {
+ Code = bitc::CST_CODE_CE_SHUFFLEVEC;
+ } else {
+ Code = bitc::CST_CODE_CE_SHUFVEC_EX;
+ Record.push_back(VE.getTypeID(C->getOperand(0)->getType()));
+ }
Record.push_back(VE.getValueID(C->getOperand(0)));
Record.push_back(VE.getValueID(C->getOperand(1)));
Record.push_back(VE.getValueID(C->getOperand(2)));
diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp
index 4e3b840..450d014 100644
--- a/lib/VMCore/Constants.cpp
+++ b/lib/VMCore/Constants.cpp
@@ -554,7 +554,10 @@
return User::operator new(s, 3);
}
ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3)
- : ConstantExpr(C1->getType(), Instruction::ShuffleVector,
+ : ConstantExpr(VectorType::get(
+ cast<VectorType>(C1->getType())->getElementType(),
+ cast<VectorType>(C3->getType())->getNumElements()),
+ Instruction::ShuffleVector,
&Op<0>(), 3) {
Op<0>() = C1;
Op<1>() = C2;
@@ -2349,7 +2352,11 @@
Constant *Mask) {
assert(ShuffleVectorInst::isValidOperands(V1, V2, Mask) &&
"Invalid shuffle vector constant expr operands!");
- return getShuffleVectorTy(V1->getType(), V1, V2, Mask);
+
+ unsigned NElts = cast<VectorType>(Mask->getType())->getNumElements();
+ const Type *EltTy = cast<VectorType>(V1->getType())->getElementType();
+ const Type *ShufTy = VectorType::get(EltTy, NElts);
+ return getShuffleVectorTy(ShufTy, V1, V2, Mask);
}
Constant *ConstantExpr::getInsertValueTy(const Type *ReqTy, Constant *Agg,
diff --git a/test/Transforms/InstCombine/shufflevec-constant.ll b/test/Transforms/InstCombine/shufflevec-constant.ll
new file mode 100644
index 0000000..f153a48
--- /dev/null
+++ b/test/Transforms/InstCombine/shufflevec-constant.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep "2 x float"
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+
+define <4 x float> @__inff4() nounwind readnone {
+entry:
+ %tmp14 = extractelement <1 x double> bitcast (<2 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000> to <1 x double>), i32 0 ; <double> [#uses=1]
+ %tmp4 = bitcast double %tmp14 to i64 ; <i64> [#uses=1]
+ %tmp3 = bitcast i64 %tmp4 to <2 x float> ; <<2 x float>> [#uses=1]
+ %tmp8 = shufflevector <2 x float> %tmp3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
+ %tmp9 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp8, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x float>> [#uses=0]
+ ret <4 x float> %tmp9
+}