commit 0ff23966feb90618bec4d085095ffbc28426e691
author Chris Lattner <sabre@nondot.org> Mon Jan 07 06:42:05 2008 +0000
committer Chris Lattner <sabre@nondot.org> Mon Jan 07 06:42:05 2008 +0000
tree e04a0cb0cec930ba0142880ca192359936aaa901
parent c17d69fa1e084668d6bb27441dbb505e2024f579

Rename all the M_* flags to be namespace qualified enums, and switch 
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 06bf010..bd66159 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -155,7 +155,7 @@
           break;
         }
       }
-      if (TID.Flags & M_COMMUTABLE)
+      if (TID.isCommutable())
         SU->isCommutable = true;
     }
     

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 846004e..ca06cbb 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -437,7 +437,7 @@
         break;
       }
     }
-    if (TID->Flags & M_COMMUTABLE)
+    if (TID->isCommutable())
       NewSU->isCommutable = true;
     // FIXME: Calculate height / depth and propagate the changes?
     NewSU->Depth = SU->Depth;

lib/CodeGen/TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index e77b95e..3167fcc 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -144,7 +144,7 @@
             // so, swap the B and C operands.  This makes the live ranges of A
             // and C joinable.
             // FIXME: This code also works for A := B op C instructions.
-            if ((TID->Flags & M_COMMUTABLE) && mi->getNumOperands() >= 3) {
+            if (TID->isCommutable() && mi->getNumOperands() >= 3) {
               assert(mi->getOperand(3-si).isRegister() &&
                      "Not a proper commutative instruction!");
               unsigned regC = mi->getOperand(3-si).getReg();

lib/Target/ARM/ARMInstrInfo.cpp

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index fa52be8..2e9d802 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -838,7 +838,7 @@
 bool ARMInstrInfo::DefinesPredicate(MachineInstr *MI,
                                     std::vector<MachineOperand> &Pred) const {
   const TargetInstrDescriptor *TID = MI->getDesc();
-  if (!TID->ImplicitDefs && (TID->Flags & M_HAS_OPTIONAL_DEF) == 0)
+  if (!TID->getImplicitDefs() && !TID->hasOptionalDef())
     return false;
 
   bool Found = false;