V8 never used the instrselectorgenerator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15791 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index 78da738..2c9e341 100644
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -16,7 +16,7 @@
# Make sure that tblgen is run, first thing.
$(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
- SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc
+ SparcV8GenInstrInfo.inc
SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
@echo "Building SparcV8.td register names with tblgen"
@@ -38,9 +38,5 @@
@echo "Building SparcV8.td instruction information with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
-SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building SparcV8.td instruction selector with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@
-
clean::
$(VERB) rm -f *.inc