| commit | 11241abca5e2a313412fed594bb9d9fa2a2057fb | [log] [tgz] |
|---|---|---|
| author | Sirish Pande <spande@codeaurora.org> | Wed Feb 15 18:22:18 2012 +0000 |
| committer | Sirish Pande <spande@codeaurora.org> | Wed Feb 15 18:22:18 2012 +0000 |
| tree | 24522791de9f4ebaf5811a3dab6601375eee4411 | |
| parent | 40d552e0be0ba66a3d8e31bf797f1acba4c91b17 [diff] [blame] |
Optimize redundant sign extends and negation of predicates git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150601 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/lib/Target/Hexagon/HexagonAsmPrinter.cpp index 5402374..4d0c5fa 100644 --- a/lib/Target/Hexagon/HexagonAsmPrinter.cpp +++ b/lib/Target/Hexagon/HexagonAsmPrinter.cpp
@@ -125,6 +125,11 @@ O << -value; } + void printHexagonNOneImmOperand(const MachineInstr *MI, unsigned OpNo, + raw_ostream &O) const { + O << -1; + } + void printHexagonMEMriOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNo);