Checkpoint NEON scheduling itineraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82657 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index eb6304c..8069e2b 100644
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -92,30 +92,21 @@
def : ProcNoItin<"iwmmxt", [ArchV5TE]>;
// V6 Processors.
-def : Processor<"arm1136j-s", V6Itineraries,
- [ArchV6]>;
-def : Processor<"arm1136jf-s", V6Itineraries,
- [ArchV6, FeatureVFP2]>;
-def : Processor<"arm1176jz-s", V6Itineraries,
- [ArchV6]>;
-def : Processor<"arm1176jzf-s", V6Itineraries,
- [ArchV6, FeatureVFP2]>;
-def : Processor<"mpcorenovfp", V6Itineraries,
- [ArchV6]>;
-def : Processor<"mpcore", V6Itineraries,
- [ArchV6, FeatureVFP2]>;
+def : ProcNoItin<"arm1136j-s", [ArchV6]>;
+def : ProcNoItin<"arm1136jf-s", [ArchV6, FeatureVFP2]>;
+def : ProcNoItin<"arm1176jz-s", [ArchV6]>;
+def : ProcNoItin<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
+def : ProcNoItin<"mpcorenovfp", [ArchV6]>;
+def : ProcNoItin<"mpcore", [ArchV6, FeatureVFP2]>;
// V6T2 Processors.
-def : Processor<"arm1156t2-s", V6Itineraries,
- [ArchV6T2, FeatureThumb2]>;
-def : Processor<"arm1156t2f-s", V6Itineraries,
- [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
+def : ProcNoItin<"arm1156t2-s", [ArchV6T2, FeatureThumb2]>;
+def : ProcNoItin<"arm1156t2f-s", [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
// V7 Processors.
def : Processor<"cortex-a8", CortexA8Itineraries,
[ArchV7A, FeatureThumb2, FeatureNEON, FeatureNEONFP]>;
-def : Processor<"cortex-a9", CortexA9Itineraries,
- [ArchV7A, FeatureThumb2, FeatureNEON]>;
+def : ProcNoItin<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
//===----------------------------------------------------------------------===//
// Register File Description