- Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58808 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 867a8f1..3e41b42 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -248,7 +248,7 @@
}
void ARMCodeEmitter::emitWordLE(unsigned Binary) {
- DOUT << "\t" << (void*)Binary << "\n";
+ DOUT << " " << (void*)Binary << "\n";
MCE.emitWordLE(Binary);
}
@@ -282,10 +282,10 @@
case ARMII::MulFrm:
emitMulFrmInstruction(MI);
break;
- case ARMII::Branch:
+ case ARMII::BrFrm:
emitBranchInstruction(MI);
break;
- case ARMII::BranchMisc:
+ case ARMII::BrMiscFrm:
emitMiscBranchInstruction(MI);
break;
}
@@ -305,7 +305,7 @@
ARMConstantPoolValue *ACPV =
static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
- DOUT << "\t** ARM constant pool #" << CPI << " @ "
+ DOUT << " ** ARM constant pool #" << CPI << " @ "
<< (void*)MCE.getCurrentPCValue() << " " << *ACPV << "\n";
GlobalValue *GV = ACPV->getGV();
@@ -322,7 +322,7 @@
} else {
Constant *CV = MCPE.Val.ConstVal;
- DOUT << "\t** Constant pool #" << CPI << " @ "
+ DOUT << " ** Constant pool #" << CPI << " @ "
<< (void*)MCE.getCurrentPCValue() << " " << *CV << "\n";
if (GlobalValue *GV = dyn_cast<GlobalValue>(CV)) {
@@ -380,7 +380,7 @@
}
void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
- DOUT << "\t** LPC" << LabelID << " @ "
+ DOUT << " ** LPC" << LabelID << " @ "
<< (void*)MCE.getCurrentPCValue() << '\n';
JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
}
@@ -566,8 +566,6 @@
void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRn) {
- const TargetInstrDesc &TID = MI.getDesc();
-
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@@ -621,8 +619,6 @@
void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRn) {
- const TargetInstrDesc &TID = MI.getDesc();
-
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@@ -751,6 +747,9 @@
void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
+ if (TID.Opcode == ARM::TPsoft)
+ abort(); // FIXME
+
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@@ -771,7 +770,10 @@
void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
- if (TID.Opcode == ARM::BX)
+ if (TID.Opcode == ARM::BX ||
+ TID.Opcode == ARM::BR_JTr ||
+ TID.Opcode == ARM::BR_JTm ||
+ TID.Opcode == ARM::BR_JTadd)
abort(); // FIXME
// Part of binary is determined by TableGn.