Major update of the MicroBlaze backend. The new features are:
1. A delay slot filler that searches for valid instructions
to fill the delay slot with. Previously NOPs would always
be inserted into delay slots.
2. Support for MC based instruction printer added.
3. Support for MC based machine code generation and ELF
file generation. ELF file generation does not yet
completely work as much of the ELF support infrastructure
is still x86/x86-64 specific.
4. General clean up of the MBlaze backend code. Much of the
tablegen code has been cleanup and simplified.
Bug Fixes:
1. Removed duplicate periods from subtarget feature descriptions.
2. Many of the instructions had bad machine code information
in the tablegen files. Much of this has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/MBlaze/fpu.ll b/test/CodeGen/MBlaze/fpu.ll
index 83f4d83..2aef4fd 100644
--- a/test/CodeGen/MBlaze/fpu.ll
+++ b/test/CodeGen/MBlaze/fpu.ll
@@ -10,14 +10,14 @@
; FPU: test_add:
%tmp.1 = fadd float %a, %b
- ; FUN-NOT: fadd
; FUN: brlid
; FPU-NOT: brlid
- ; FPU: fadd
ret float %tmp.1
; FUN: rtsd
; FPU: rtsd
+ ; FUN-NOT: fadd
+ ; FPU-NEXT: fadd
}
define float @test_sub(float %a, float %b) {
@@ -25,14 +25,14 @@
; FPU: test_sub:
%tmp.1 = fsub float %a, %b
- ; FUN-NOT: frsub
; FUN: brlid
; FPU-NOT: brlid
- ; FPU: frsub
ret float %tmp.1
; FUN: rtsd
; FPU: rtsd
+ ; FUN-NOT: frsub
+ ; FPU-NEXT: frsub
}
define float @test_mul(float %a, float %b) {
@@ -40,14 +40,14 @@
; FPU: test_mul:
%tmp.1 = fmul float %a, %b
- ; FUN-NOT: fmul
; FUN: brlid
; FPU-NOT: brlid
- ; FPU: fmul
ret float %tmp.1
; FUN: rtsd
; FPU: rtsd
+ ; FUN-NOT: fmul
+ ; FPU-NEXT: fmul
}
define float @test_div(float %a, float %b) {
@@ -55,12 +55,12 @@
; FPU: test_div:
%tmp.1 = fdiv float %a, %b
- ; FUN-NOT: fdiv
; FUN: brlid
; FPU-NOT: brlid
- ; FPU: fdiv
ret float %tmp.1
; FUN: rtsd
; FPU: rtsd
+ ; FUN-NOT: fdiv
+ ; FPU-NEXT: fdiv
}