Add assertion checks here to turn silent miscompiles into aborts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85639 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/ScheduleDAGEmit.cpp b/lib/CodeGen/ScheduleDAGEmit.cpp
index 0d15c02..8e03420 100644
--- a/lib/CodeGen/ScheduleDAGEmit.cpp
+++ b/lib/CodeGen/ScheduleDAGEmit.cpp
@@ -50,8 +50,10 @@
break;
}
}
- TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
- SU->CopyDstRC, SU->CopySrcRC);
+ bool Success = TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
+ SU->CopyDstRC, SU->CopySrcRC);
+ (void)Success;
+ assert(Success && "copyRegToReg failed!");
} else {
// Copy from physical register.
assert(I->getReg() && "Unknown physical register!");
@@ -59,8 +61,10 @@
bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
- TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
- SU->CopyDstRC, SU->CopySrcRC);
+ bool Success = TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
+ SU->CopyDstRC, SU->CopySrcRC);
+ (void)Success;
+ assert(Success && "copyRegToReg failed!");
}
break;
}