Codegen CopyFromReg using the regclass that matches the valuetype of the
destination vreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23586 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 4d54d54..ca01486 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -1031,11 +1031,11 @@
if (MRegisterInfo::isVirtualRegister(SrcReg)) {
TRC = RegMap->getRegClass(SrcReg);
} else {
- // FIXME: we don't know what register class to generate this for. Do
- // a brute force search and pick the first match. :(
+ // Pick the register class of the right type that contains this physreg.
for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
- E = MRI.regclass_end(); I != E; ++I)
- if ((*I)->contains(SrcReg)) {
+ E = MRI.regclass_end(); I != E; ++I)
+ if ((*I)->getType() == Node->getValueType(0) &&
+ (*I)->contains(SrcReg)) {
TRC = *I;
break;
}
@@ -1100,7 +1100,8 @@
Op.getOperand(i).getValueType() != MVT::Flag &&
"Chain and flag operands should occur at end of operand list!");
- MI->addRegOperand(EmitDAG(Op.getOperand(i)), MachineOperand::Use);
+ unsigned VReg = EmitDAG(Op.getOperand(i));
+ MI->addRegOperand(VReg, MachineOperand::Use);
} else if (ConstantSDNode *C =
dyn_cast<ConstantSDNode>(Op.getOperand(i))) {
MI->addZeroExtImm64Operand(C->getValue());
@@ -1126,7 +1127,8 @@
assert(Op.getOperand(i).getValueType() != MVT::Other &&
Op.getOperand(i).getValueType() != MVT::Flag &&
"Chain and flag operands should occur at end of operand list!");
- MI->addRegOperand(EmitDAG(Op.getOperand(i)), MachineOperand::Use);
+ unsigned VReg = EmitDAG(Op.getOperand(i));
+ MI->addRegOperand(VReg, MachineOperand::Use);
}
}
@@ -1188,11 +1190,11 @@
if (MRegisterInfo::isVirtualRegister(SrcReg)) {
TRC = RegMap->getRegClass(SrcReg);
} else {
- // FIXME: we don't know what register class to generate this for. Do
- // a brute force search and pick the first match. :(
+ // Pick the register class of the right type that contains this physreg.
for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
E = MRI.regclass_end(); I != E; ++I)
- if ((*I)->contains(SrcReg)) {
+ if ((*I)->getType() == Op.Val->getValueType(0) &&
+ (*I)->contains(SrcReg)) {
TRC = *I;
break;
}