commit 15d03fb7f496562d7256ecac69f63e08ee0bfd2e
author Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Thu Jul 28 01:26:53 2011 +0000
committer Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Thu Jul 28 01:26:53 2011 +0000
tree 2bd33789bef92b38db00bb6cd3965b8981d05f8d
parent 93fa4766c21062c06a274d09169e15779c06603b

Invert the subvector insertion to be more likely to be taken as a COPY

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136324 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index e1c64ea..e969553 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4809,9 +4809,9 @@
                                 NumElems/2);
 
     // Recreate the wider vector with the lower and upper part.
-    SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Upper,
-                                DAG.getConstant(NumElems/2, MVT::i32), DAG, dl);
-    return Insert128BitVector(Vec, Lower, DAG.getConstant(0, MVT::i32),
+    SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Lower,
+                                DAG.getConstant(0, MVT::i32), DAG, dl);
+    return Insert128BitVector(Vec, Upper, DAG.getConstant(NumElems/2, MVT::i32),
                               DAG, dl);
   }