Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15747 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index b2e2125..7b3a504 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -14,6 +14,7 @@
#include "AsmWriterEmitter.h"
#include "CodeGenTarget.h"
+#include "Record.h"
#include <ostream>
using namespace llvm;
@@ -28,13 +29,19 @@
EmitSourceFileHeader("Assembly Writer Source Fragment", O);
CodeGenTarget Target;
+
+ Record *AsmWriter = Target.getAsmWriter();
+
+ std::string AsmWriterClassName =
+ AsmWriter->getValueAsString("AsmWriterClassName");
+
O <<
"/// printInstruction - This method is automatically generated by tablegen\n"
"/// from the instruction set description. This method returns true if the\n"
"/// machine instruction was sufficiently described to print it, otherwise\n"
"/// it returns false.\n"
- "bool " << Target.getName()
- << "AsmPrinter::printInstruction(const MachineInstr *MI) {\n";
+ "bool " << Target.getName() << AsmWriterClassName
+ << "::printInstruction(const MachineInstr *MI) {\n";
O << " switch (MI->getOpcode()) {\n"
" default: return false;\n";
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 85be70e..5e6af31 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -74,7 +74,7 @@
bool isTwoAddress;
bool isTerminator;
- CodeGenInstruction(Record *R);
+ CodeGenInstruction(Record *R, const std::string &AsmStr);
/// getOperandNamed - Return the index of the operand with the specified
/// non-empty name. If the instruction does not have an operand with the
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index e7ca857..9e52cbc 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -97,14 +97,27 @@
return TargetRec->getValueAsDef("InstructionSet");
}
+/// getAsmWriter - Return the AssemblyWriter definition for this target.
+///
+Record *CodeGenTarget::getAsmWriter() const {
+ return TargetRec->getValueAsDef("AssemblyWriter");
+}
+
+
void CodeGenTarget::ReadInstructions() const {
std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
if (Insts.size() == 0)
throw std::string("No 'Instruction' subclasses defined!");
- for (unsigned i = 0, e = Insts.size(); i != e; ++i)
- Instructions.insert(std::make_pair(Insts[i]->getName(), Insts[i]));
+ std::string InstFormatName =
+ getAsmWriter()->getValueAsString("InstFormatName");
+
+ for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
+ std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
+ Instructions.insert(std::make_pair(Insts[i]->getName(),
+ CodeGenInstruction(Insts[i], AsmStr)));
+ }
}
/// getPHIInstruction - Return the designated PHI instruction.
@@ -117,10 +130,10 @@
return I->second;
}
-CodeGenInstruction::CodeGenInstruction(Record *R) : TheDef(R) {
+CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
+ : TheDef(R), AsmString(AsmStr) {
Name = R->getValueAsString("Name");
Namespace = R->getValueAsString("Namespace");
- AsmString = R->getValueAsString("AsmString");
isReturn = R->getValueAsBit("isReturn");
isBranch = R->getValueAsBit("isBranch");
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index e711b81..218fef8 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -56,10 +56,14 @@
MVT::ValueType getPointerType() const { return PointerType; }
- // getInstructionSet - Return the InstructionSet object.
+ /// getInstructionSet - Return the InstructionSet object.
///
Record *getInstructionSet() const;
+ /// getAsmWriter - Return the AssemblyWriter definition for this target.
+ ///
+ Record *getAsmWriter() const;
+
/// getPHIInstruction - Return the designated PHI instruction.
const CodeGenInstruction &getPHIInstruction() const;