commit 17a1e8775119db75ece41e041eeb6480793696ff
author Akira Hatanaka <ahatanak@gmail.com> Fri May 20 18:39:33 2011 +0000
committer Akira Hatanaka <ahatanak@gmail.com> Fri May 20 18:39:33 2011 +0000
tree 610a54510d70d55eae0c7ae5fd1d1886dca5c6d0
parent f85092c25525f75eef6982ffa40c9b48b87da987

Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
saving and restoring them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/Mips/i64arg.ll

diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll
index 560f2e9..9a30453 100644
--- a/test/CodeGen/Mips/i64arg.ll
+++ b/test/CodeGen/Mips/i64arg.ll
@@ -10,8 +10,8 @@
 ; CHECK: jalr
   tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind
 ; CHECK: lw $25, %call16(ff2)
-; CHECK: lw $[[R2:[0-9]+]], 88($sp)
-; CHECK: lw $[[R3:[0-9]+]], 92($sp)
+; CHECK: lw $[[R2:[0-9]+]], 80($sp)
+; CHECK: lw $[[R3:[0-9]+]], 84($sp)
 ; CHECK: addu $4, $zero, $[[R2]]
 ; CHECK: addu $5, $zero, $[[R3]]
 ; CHECK: jalr $25